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KVM: arm64: Enable the EL1 physical timer for AArch32 guests
Some 32bits guest OS can use the CNTP timer, however KVM does not handle the accesses, injecting a fault instead. Use the proper handlers to emulate the EL1 Physical Timer (CNTP) register accesses of AArch32 guests. Signed-off-by: Jérémy Fanguède <j.fanguede@virtualopensystems.com> Signed-off-by: Alvise Rigo <a.rigo@virtualopensystems.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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@ -1565,6 +1565,11 @@ static const struct sys_reg_desc cp15_regs[] = {
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{ Op1( 0), CRn(13), CRm( 0), Op2( 1), access_vm_reg, NULL, c13_CID },
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/* CNTP_TVAL */
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{ Op1( 0), CRn(14), CRm( 2), Op2( 0), access_cntp_tval },
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/* CNTP_CTL */
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{ Op1( 0), CRn(14), CRm( 2), Op2( 1), access_cntp_ctl },
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/* PMEVCNTRn */
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PMU_PMEVCNTR(0),
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PMU_PMEVCNTR(1),
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@ -1638,6 +1643,7 @@ static const struct sys_reg_desc cp15_64_regs[] = {
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{ Op1( 0), CRn( 0), CRm( 9), Op2( 0), access_pmu_evcntr },
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{ Op1( 0), CRn( 0), CRm(12), Op2( 0), access_gic_sgi },
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{ Op1( 1), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, c2_TTBR1 },
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{ Op1( 2), CRn( 0), CRm(14), Op2( 0), access_cntp_cval },
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};
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/* Target specific emulation tables */
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