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sh_eth: define/use EESR_RX_CHECK macro
sh_eth_interrupt() uses the same Rx interrupt mask twice to check the interrupt status register -- #define EESR_RX_CHECK and use it instead. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1504,23 +1504,14 @@ static irqreturn_t sh_eth_interrupt(int irq, void *netdev)
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*/
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intr_status &= sh_eth_read(ndev, EESIPR) | DMAC_M_ECI;
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/* Clear interrupt */
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if (intr_status & (EESR_FRC | EESR_RMAF | EESR_RRF |
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EESR_RTLF | EESR_RTSF | EESR_PRE | EESR_CERF |
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cd->tx_check | cd->eesr_err_check)) {
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if (intr_status & (EESR_RX_CHECK | cd->tx_check | cd->eesr_err_check)) {
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sh_eth_write(ndev, intr_status, EESR);
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ret = IRQ_HANDLED;
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} else
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goto other_irq;
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if (intr_status & (EESR_FRC | /* Frame recv*/
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EESR_RMAF | /* Multi cast address recv*/
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EESR_RRF | /* Bit frame recv */
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EESR_RTLF | /* Long frame recv*/
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EESR_RTSF | /* short frame recv */
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EESR_PRE | /* PHY-LSI recv error */
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EESR_CERF)){ /* recv frame CRC error */
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if (intr_status & EESR_RX_CHECK)
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sh_eth_rx(ndev, intr_status);
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}
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/* Tx Check */
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if (intr_status & cd->tx_check) {
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@ -248,6 +248,14 @@ enum EESR_BIT {
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EESR_CERF = 0x00000001,
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};
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#define EESR_RX_CHECK (EESR_FRC | /* Frame recv */ \
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EESR_RMAF | /* Multicast address recv */ \
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EESR_RRF | /* Bit frame recv */ \
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EESR_RTLF | /* Long frame recv */ \
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EESR_RTSF | /* Short frame recv */ \
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EESR_PRE | /* PHY-LSI recv error */ \
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EESR_CERF) /* Recv frame CRC error */
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#define DEFAULT_TX_CHECK (EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | \
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EESR_RTO)
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#define DEFAULT_EESR_ERR_CHECK (EESR_TWB | EESR_TABT | EESR_RABT | \
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