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IRQCHIP: mips-gic: Add missing definitions for FDC IRQ
Add missing VPE_PEND, VPE_RMASK and VPE_SMASK definitions for the local FDC interrupt. These local interrupt definitions aren't directly used, but if they exist they should be complete. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-mips@linux-mips.org Reviewed-by: Andrew Bresticker <abrestic@chromium.org> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9127/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -165,6 +165,8 @@
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#define GIC_VPE_PEND_SWINT0_MSK (MSK(1) << GIC_VPE_PEND_SWINT0_SHF)
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#define GIC_VPE_PEND_SWINT1_SHF 5
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#define GIC_VPE_PEND_SWINT1_MSK (MSK(1) << GIC_VPE_PEND_SWINT1_SHF)
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#define GIC_VPE_PEND_FDC_SHF 6
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#define GIC_VPE_PEND_FDC_MSK (MSK(1) << GIC_VPE_PEND_FDC_SHF)
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/* GIC_VPE_RMASK Masks */
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#define GIC_VPE_RMASK_WD_SHF 0
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@ -179,6 +181,8 @@
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#define GIC_VPE_RMASK_SWINT0_MSK (MSK(1) << GIC_VPE_RMASK_SWINT0_SHF)
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#define GIC_VPE_RMASK_SWINT1_SHF 5
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#define GIC_VPE_RMASK_SWINT1_MSK (MSK(1) << GIC_VPE_RMASK_SWINT1_SHF)
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#define GIC_VPE_RMASK_FDC_SHF 6
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#define GIC_VPE_RMASK_FDC_MSK (MSK(1) << GIC_VPE_RMASK_FDC_SHF)
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/* GIC_VPE_SMASK Masks */
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#define GIC_VPE_SMASK_WD_SHF 0
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@ -193,6 +197,8 @@
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#define GIC_VPE_SMASK_SWINT0_MSK (MSK(1) << GIC_VPE_SMASK_SWINT0_SHF)
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#define GIC_VPE_SMASK_SWINT1_SHF 5
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#define GIC_VPE_SMASK_SWINT1_MSK (MSK(1) << GIC_VPE_SMASK_SWINT1_SHF)
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#define GIC_VPE_SMASK_FDC_SHF 6
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#define GIC_VPE_SMASK_FDC_MSK (MSK(1) << GIC_VPE_SMASK_FDC_SHF)
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/* GIC nomenclature for Core Interrupt Pins. */
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#define GIC_CPU_INT0 0 /* Core Interrupt 2 */
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