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Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: fix early panic with boot option "nosmp" x86/oprofile: fix Intel cpu family 6 detection oprofile: fix CPU unplug panic in ppro_stop() AMD IOMMU: fix possible race while accessing iommu->need_sync AMD IOMMU: set device table entry for aliased devices AMD IOMMU: struct amd_iommu remove padding on 64 bit x86: fix broken flushing in GART nofullflush path x86: fix dma_mapping_error for 32bit x86
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commit
e948990f95
@ -251,13 +251,6 @@ struct amd_iommu {
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/* Pointer to PCI device of this IOMMU */
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struct pci_dev *dev;
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/*
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* Capability pointer. There could be more than one IOMMU per PCI
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* device function if there are more than one AMD IOMMU capability
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* pointers.
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*/
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u16 cap_ptr;
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/* physical address of MMIO space */
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u64 mmio_phys;
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/* virtual address of MMIO space */
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@ -266,6 +259,13 @@ struct amd_iommu {
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/* capabilities of that IOMMU read from ACPI */
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u32 cap;
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/*
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* Capability pointer. There could be more than one IOMMU per PCI
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* device function if there are more than one AMD IOMMU capability
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* pointers.
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*/
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u16 cap_ptr;
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/* pci domain of this IOMMU */
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u16 pci_seg;
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@ -284,19 +284,19 @@ struct amd_iommu {
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/* size of command buffer */
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u32 cmd_buf_size;
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/* event buffer virtual address */
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u8 *evt_buf;
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/* size of event buffer */
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u32 evt_buf_size;
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/* event buffer virtual address */
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u8 *evt_buf;
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/* MSI number for event interrupt */
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u16 evt_msi_num;
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/* if one, we need to send a completion wait command */
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int need_sync;
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/* true if interrupts for this IOMMU are already enabled */
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bool int_enabled;
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/* if one, we need to send a completion wait command */
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int need_sync;
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/* default dma_ops domain for that IOMMU */
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struct dma_ops_domain *default_dom;
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};
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@ -71,15 +71,13 @@ static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
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/* Make sure we keep the same behaviour */
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static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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#ifdef CONFIG_X86_32
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return 0;
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#else
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#ifdef CONFIG_X86_64
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struct dma_mapping_ops *ops = get_dma_ops(dev);
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if (ops->mapping_error)
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return ops->mapping_error(dev, dma_addr);
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return (dma_addr == bad_dma_address);
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#endif
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return (dma_addr == bad_dma_address);
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}
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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@ -187,6 +187,8 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
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spin_lock_irqsave(&iommu->lock, flags);
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ret = __iommu_queue_command(iommu, cmd);
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if (!ret)
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iommu->need_sync = 1;
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spin_unlock_irqrestore(&iommu->lock, flags);
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return ret;
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@ -210,10 +212,13 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
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cmd.data[0] = CMD_COMPL_WAIT_INT_MASK;
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CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT);
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iommu->need_sync = 0;
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spin_lock_irqsave(&iommu->lock, flags);
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if (!iommu->need_sync)
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goto out;
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iommu->need_sync = 0;
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ret = __iommu_queue_command(iommu, &cmd);
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if (ret)
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@ -254,8 +259,6 @@ static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
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ret = iommu_queue_command(iommu, &cmd);
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iommu->need_sync = 1;
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return ret;
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}
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@ -281,8 +284,6 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
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ret = iommu_queue_command(iommu, &cmd);
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iommu->need_sync = 1;
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return ret;
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}
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@ -762,8 +763,6 @@ static void set_device_domain(struct amd_iommu *iommu,
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write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
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iommu_queue_inv_dev_entry(iommu, devid);
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iommu->need_sync = 1;
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}
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/*****************************************************************************
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@ -858,6 +857,9 @@ static int get_device_resources(struct device *dev,
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print_devid(_bdf, 1);
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}
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if (domain_for_device(_bdf) == NULL)
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set_device_domain(*iommu, *domain, _bdf);
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return 1;
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}
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@ -1031,8 +1033,7 @@ static dma_addr_t map_single(struct device *dev, phys_addr_t paddr,
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if (addr == bad_dma_address)
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goto out;
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if (unlikely(iommu->need_sync))
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iommu_completion_wait(iommu);
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iommu_completion_wait(iommu);
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out:
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spin_unlock_irqrestore(&domain->lock, flags);
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@ -1060,8 +1061,7 @@ static void unmap_single(struct device *dev, dma_addr_t dma_addr,
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__unmap_single(iommu, domain->priv, dma_addr, size, dir);
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if (unlikely(iommu->need_sync))
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iommu_completion_wait(iommu);
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iommu_completion_wait(iommu);
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spin_unlock_irqrestore(&domain->lock, flags);
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}
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@ -1127,8 +1127,7 @@ static int map_sg(struct device *dev, struct scatterlist *sglist,
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goto unmap;
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}
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if (unlikely(iommu->need_sync))
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iommu_completion_wait(iommu);
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iommu_completion_wait(iommu);
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out:
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spin_unlock_irqrestore(&domain->lock, flags);
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@ -1173,8 +1172,7 @@ static void unmap_sg(struct device *dev, struct scatterlist *sglist,
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s->dma_address = s->dma_length = 0;
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}
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if (unlikely(iommu->need_sync))
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iommu_completion_wait(iommu);
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iommu_completion_wait(iommu);
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spin_unlock_irqrestore(&domain->lock, flags);
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}
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@ -1225,8 +1223,7 @@ static void *alloc_coherent(struct device *dev, size_t size,
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goto out;
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}
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if (unlikely(iommu->need_sync))
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iommu_completion_wait(iommu);
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iommu_completion_wait(iommu);
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out:
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spin_unlock_irqrestore(&domain->lock, flags);
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@ -1257,8 +1254,7 @@ static void free_coherent(struct device *dev, size_t size,
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__unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL);
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if (unlikely(iommu->need_sync))
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iommu_completion_wait(iommu);
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iommu_completion_wait(iommu);
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spin_unlock_irqrestore(&domain->lock, flags);
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@ -604,6 +604,9 @@ static void __init __get_smp_config(unsigned int early)
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printk(KERN_INFO "Using ACPI for processor (LAPIC) "
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"configuration information\n");
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if (!mpf)
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return;
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printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
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mpf->mpf_specification);
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#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
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@ -123,6 +123,8 @@ static void free_iommu(unsigned long offset, int size)
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spin_lock_irqsave(&iommu_bitmap_lock, flags);
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iommu_area_free(iommu_gart_bitmap, offset, size);
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if (offset >= next_bit)
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next_bit = offset + size;
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spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
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}
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@ -401,14 +401,13 @@ static int __init ppro_init(char **cpu_type)
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*cpu_type = "i386/pii";
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break;
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case 6 ... 8:
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case 10 ... 11:
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*cpu_type = "i386/piii";
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break;
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case 9:
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case 13:
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*cpu_type = "i386/p6_mobile";
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break;
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case 10 ... 13:
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*cpu_type = "i386/p6";
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break;
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case 14:
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*cpu_type = "i386/core";
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break;
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@ -156,6 +156,8 @@ static void ppro_start(struct op_msrs const * const msrs)
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unsigned int low, high;
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int i;
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if (!reset_value)
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return;
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for (i = 0; i < num_counters; ++i) {
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if (reset_value[i]) {
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CTRL_READ(low, high, msrs, i);
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@ -171,6 +173,8 @@ static void ppro_stop(struct op_msrs const * const msrs)
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unsigned int low, high;
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int i;
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if (!reset_value)
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return;
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for (i = 0; i < num_counters; ++i) {
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if (!reset_value[i])
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continue;
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