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[POWERPC] 4xx bootwrapper reworks
Make the fixup_memsize function common for all of 4xx as several chips share the same SDRAM controller. Also add functions to reset 40x chips and quiesce the ethernet. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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@ -10,10 +10,6 @@
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#ifndef _PPC_BOOT_44X_H_
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#define _PPC_BOOT_44X_H_
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void ibm44x_fixup_memsize(void);
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void ibm4xx_fixup_ebc_ranges(const char *ebc);
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void ibm44x_dbcr_reset(void);
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void ebony_init(void *mac0, void *mac1);
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#endif /* _PPC_BOOT_44X_H_ */
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@ -21,8 +21,8 @@
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#include "reg.h"
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#include "dcr.h"
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/* Read the 44x memory controller to get size of system memory. */
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void ibm44x_fixup_memsize(void)
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/* Read the 4xx SDRAM controller to get size of system memory. */
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void ibm4xx_fixup_memsize(void)
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{
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int i;
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unsigned long memsize, bank_config;
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@ -39,8 +39,9 @@ void ibm44x_fixup_memsize(void)
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dt_fixup_memory(0, memsize);
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}
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#define SPRN_DBCR0 0x134
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#define DBCR0_RST_SYSTEM 0x30000000
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#define SPRN_DBCR0_40X 0x3F2
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#define SPRN_DBCR0_44X 0x134
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#define DBCR0_RST_SYSTEM 0x30000000
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void ibm44x_dbcr_reset(void)
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{
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@ -50,11 +51,35 @@ void ibm44x_dbcr_reset(void)
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"mfspr %0,%1\n"
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"oris %0,%0,%2@h\n"
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"mtspr %1,%0"
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: "=&r"(tmp) : "i"(SPRN_DBCR0), "i"(DBCR0_RST_SYSTEM)
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: "=&r"(tmp) : "i"(SPRN_DBCR0_44X), "i"(DBCR0_RST_SYSTEM)
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);
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}
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void ibm40x_dbcr_reset(void)
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{
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unsigned long tmp;
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asm volatile (
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"mfspr %0,%1\n"
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"oris %0,%0,%2@h\n"
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"mtspr %1,%0"
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: "=&r"(tmp) : "i"(SPRN_DBCR0_40X), "i"(DBCR0_RST_SYSTEM)
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);
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}
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#define EMAC_RESET 0x20000000
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void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1)
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{
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/* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't do this for us */
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if (emac0)
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*emac0 = EMAC_RESET;
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if (emac1)
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*emac1 = EMAC_RESET;
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mtdcr(DCRN_MAL0_CFG, MAL_RESET);
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}
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/* Read 4xx EBC bus bridge registers to get mappings of the peripheral
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* banks into the OPB address space */
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void ibm4xx_fixup_ebc_ranges(const char *ebc)
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20
arch/powerpc/boot/4xx.h
Normal file
20
arch/powerpc/boot/4xx.h
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@ -0,0 +1,20 @@
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/*
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* PowerPC 4xx related functions
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*
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* Copyright 2007 IBM Corporation.
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* Josh Boyer <jwboyer@linux.vnet.ibm.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef _POWERPC_BOOT_4XX_H_
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#define _POWERPC_BOOT_4XX_H_
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void ibm4xx_fixup_memsize(void);
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void ibm44x_dbcr_reset(void);
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void ibm40x_dbcr_reset(void);
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void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1);
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void ibm4xx_fixup_ebc_ranges(const char *ebc);
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#endif /* _POWERPC_BOOT_4XX_H_ */
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@ -121,4 +121,7 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2C
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#define DCRN_CPC0_MIRQ1 0x0ed
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#define DCRN_CPC0_JTAGID 0x0ef
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#define DCRN_MAL0_CFG 0x180
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#define MAL_RESET 0x80000000
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#endif /* _PPC_BOOT_DCR_H_ */
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@ -26,6 +26,7 @@
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#include "reg.h"
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#include "io.h"
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#include "dcr.h"
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#include "4xx.h"
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#include "44x.h"
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extern char _dtb_start[];
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@ -136,7 +137,7 @@ static void ebony_fixups(void)
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unsigned long sysclk = 33000000;
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ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
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ibm44x_fixup_memsize();
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ibm4xx_fixup_memsize();
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dt_fixup_mac_addresses(ebony_mac0, ebony_mac1);
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ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
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ebony_flashsel_fixup();
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