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https://github.com/edk2-porting/linux-next.git
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MMC core:
- Terminate infinite loop in SD-UHS voltage switch MMC host: - hsq: Fix kernel crash in the recovery path - moxart: Fix bus width configurations - sdhci: Fix kernel panic for cqe irq ARM_SCMI: - Fixup clock management by reverting "firmware: arm_scmi: Add clock management to the SCMI power domain" -----BEGIN PGP SIGNATURE----- iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmM0BoQXHHVsZi5oYW5z c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCmFIw//ZhctvlbOQa2StMO2GrJfgQGi ELclXWN1MzyyTN2v93LRrIwu1FR3vFV8sJ/80wlt+o0l4XBuwewmlUXdxGEdKwKA 2+Luj5f2sDf1z9wXsVLjybQ7ujD60jSrXgO6sGvF8a4cy0sCW7O3/3sytrXXHqzj vU5zvr4Y6aBiruEpAFXBKyGWxpj0iFjvMo+ZuJpOHgHiVSF2UWOXuLbuAn04ESG6 Z3sn8qMZbTFI1HoE2XHF7xB10j9sYu09Urp57xAUFLuYf7Rr+MRNDqjByESnl9H7 SZcgomCoycUyjSDSLqdrr0Z4eJ7zacyHRHEYEzX/owAanE9GQpwGDauDYrVHFn7o 75uT6ZhJZwoLguM+6NiURYraIl75o4ijDKhFYrm+8dEmFfTi3hy9Ey86pFsr3UWm RC+Dxi/oY7mkrpAEwJwkixzUGKqX/42a9zBcUbejE8x1UEw8sljboz3kEzTBlaDU 4mhdeY5//dHOhl3V8V9Oj9rQZJ7jfPJbrg0qK65EEDW5TumMTGnQzR9Zl1BfWBIA lzIKq3USZ+5Gm8KvZ0yYq8bHmGaYKd/aFfZ3RTHIsPPx7pXt0G81SkE+eJ/jDkRN FL7TU1wgWU9ovFw0N1LScr/EH/juIl+3bqhMRSuk5cBgDdVuCmKT5XS/694GfZkl /JUySvxena/yGlNn/Mg= =F5JH -----END PGP SIGNATURE----- Merge tag 'mmc-v6.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc Pull MMC fixes from Ulf Hansson: "A couple of MMC fixes. This time there is also a fix for the ARM SCMI firmware driver, which has been acked by Sudeep Holla, the maintainer. MMC core: - Terminate infinite loop in SD-UHS voltage switch MMC host: - hsq: Fix kernel crash in the recovery path - moxart: Fix bus width configurations - sdhci: Fix kernel panic for cqe irq ARM_SCMI: - Fixup clock management by reverting 'firmware: arm_scmi: Add clock management to the SCMI power domain'" * tag 'mmc-v6.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: hsq: Fix data stomping during mmc recovery Revert "firmware: arm_scmi: Add clock management to the SCMI power domain" mmc: core: Terminate infinite loop in SD-UHS voltage switch mmc: moxart: fix 4-bit bus width and remove 8-bit bus width mmc: sdhci: Fix host->cmd is null
This commit is contained in:
commit
e817c070fd
@ -8,7 +8,6 @@
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/pm_clock.h>
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#include <linux/pm_domain.h>
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#include <linux/scmi_protocol.h>
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@ -53,27 +52,6 @@ static int scmi_pd_power_off(struct generic_pm_domain *domain)
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return scmi_pd_power(domain, false);
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}
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static int scmi_pd_attach_dev(struct generic_pm_domain *pd, struct device *dev)
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{
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int ret;
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ret = pm_clk_create(dev);
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if (ret)
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return ret;
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ret = of_pm_clk_add_clks(dev);
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if (ret >= 0)
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return 0;
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pm_clk_destroy(dev);
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return ret;
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}
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static void scmi_pd_detach_dev(struct generic_pm_domain *pd, struct device *dev)
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{
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pm_clk_destroy(dev);
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}
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static int scmi_pm_domain_probe(struct scmi_device *sdev)
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{
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int num_domains, i;
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@ -124,10 +102,6 @@ static int scmi_pm_domain_probe(struct scmi_device *sdev)
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scmi_pd->genpd.name = scmi_pd->name;
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scmi_pd->genpd.power_off = scmi_pd_power_off;
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scmi_pd->genpd.power_on = scmi_pd_power_on;
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scmi_pd->genpd.attach_dev = scmi_pd_attach_dev;
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scmi_pd->genpd.detach_dev = scmi_pd_detach_dev;
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scmi_pd->genpd.flags = GENPD_FLAG_PM_CLK |
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GENPD_FLAG_ACTIVE_WAKEUP;
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pm_genpd_init(&scmi_pd->genpd, NULL,
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state == SCMI_POWER_STATE_GENERIC_OFF);
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@ -870,7 +870,8 @@ try_again:
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* the CCS bit is set as well. We deliberately deviate from the spec in
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* regards to this, which allows UHS-I to be supported for SDSC cards.
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*/
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if (!mmc_host_is_spi(host) && rocr && (*rocr & SD_ROCR_S18A)) {
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if (!mmc_host_is_spi(host) && (ocr & SD_OCR_S18R) &&
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rocr && (*rocr & SD_ROCR_S18A)) {
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err = mmc_set_uhs_voltage(host, pocr);
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if (err == -EAGAIN) {
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retries--;
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@ -34,7 +34,7 @@ static void mmc_hsq_pump_requests(struct mmc_hsq *hsq)
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spin_lock_irqsave(&hsq->lock, flags);
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/* Make sure we are not already running a request now */
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if (hsq->mrq) {
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if (hsq->mrq || hsq->recovery_halt) {
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spin_unlock_irqrestore(&hsq->lock, flags);
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return;
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}
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@ -111,8 +111,8 @@
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#define CLK_DIV_MASK 0x7f
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/* REG_BUS_WIDTH */
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#define BUS_WIDTH_8 BIT(2)
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#define BUS_WIDTH_4 BIT(1)
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#define BUS_WIDTH_4_SUPPORT BIT(3)
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#define BUS_WIDTH_4 BIT(2)
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#define BUS_WIDTH_1 BIT(0)
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#define MMC_VDD_360 23
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@ -524,9 +524,6 @@ static void moxart_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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case MMC_BUS_WIDTH_4:
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writel(BUS_WIDTH_4, host->base + REG_BUS_WIDTH);
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break;
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case MMC_BUS_WIDTH_8:
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writel(BUS_WIDTH_8, host->base + REG_BUS_WIDTH);
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break;
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default:
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writel(BUS_WIDTH_1, host->base + REG_BUS_WIDTH);
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break;
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@ -651,16 +648,8 @@ static int moxart_probe(struct platform_device *pdev)
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dmaengine_slave_config(host->dma_chan_rx, &cfg);
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}
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switch ((readl(host->base + REG_BUS_WIDTH) >> 3) & 3) {
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case 1:
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if (readl(host->base + REG_BUS_WIDTH) & BUS_WIDTH_4_SUPPORT)
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mmc->caps |= MMC_CAP_4_BIT_DATA;
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break;
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case 2:
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mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
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break;
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default:
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break;
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}
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writel(0, host->base + REG_INTERRUPT_MASK);
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@ -3928,7 +3928,7 @@ bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error,
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if (intmask & (SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC)) {
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*cmd_error = -EILSEQ;
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if (!mmc_op_tuning(host->cmd->opcode))
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if (!mmc_op_tuning(SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND))))
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sdhci_err_stats_inc(host, CMD_CRC);
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} else if (intmask & SDHCI_INT_TIMEOUT) {
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*cmd_error = -ETIMEDOUT;
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@ -3938,7 +3938,7 @@ bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error,
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if (intmask & (SDHCI_INT_DATA_END_BIT | SDHCI_INT_DATA_CRC)) {
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*data_error = -EILSEQ;
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if (!mmc_op_tuning(host->cmd->opcode))
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if (!mmc_op_tuning(SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND))))
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sdhci_err_stats_inc(host, DAT_CRC);
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} else if (intmask & SDHCI_INT_DATA_TIMEOUT) {
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*data_error = -ETIMEDOUT;
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