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OMAP2+: VC: support PMICs with separate voltage and command registers
The VC layer can support PMICs with separate voltage and command registers by putting the different registers in the PRM_VC_SMPS_VOL_RA and PRCM_VC_SMPS_CMD_RA registers respectively. The PMIC data must supply at least a voltage register address (volt_reg_addr). The command register address (cmd_reg_addr) is optional. If the PMIC data does not supply a separate command register address, the VC will use the voltage register address for both. Signed-off-by: Kevin Hilman <khilman@ti.com>
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@ -158,7 +158,7 @@ static struct omap_volt_pmic_info omap3_mpu_volt_info = {
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.vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX,
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.vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
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.i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
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.pmic_reg = OMAP3_VDD_MPU_SR_CONTROL_REG,
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.volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG,
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.vsel_to_uv = twl4030_vsel_to_uv,
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.uv_to_vsel = twl4030_uv_to_vsel,
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};
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@ -178,7 +178,7 @@ static struct omap_volt_pmic_info omap3_core_volt_info = {
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.vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX,
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.vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
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.i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
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.pmic_reg = OMAP3_VDD_CORE_SR_CONTROL_REG,
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.volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG,
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.vsel_to_uv = twl4030_vsel_to_uv,
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.uv_to_vsel = twl4030_uv_to_vsel,
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};
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@ -198,7 +198,7 @@ static struct omap_volt_pmic_info omap4_mpu_volt_info = {
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.vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX,
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.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
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.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
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.pmic_reg = OMAP4_VDD_MPU_SR_VOLT_REG,
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.volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG,
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.vsel_to_uv = twl6030_vsel_to_uv,
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.uv_to_vsel = twl6030_uv_to_vsel,
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};
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@ -218,7 +218,7 @@ static struct omap_volt_pmic_info omap4_iva_volt_info = {
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.vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX,
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.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
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.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
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.pmic_reg = OMAP4_VDD_IVA_SR_VOLT_REG,
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.volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG,
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.vsel_to_uv = twl6030_vsel_to_uv,
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.uv_to_vsel = twl6030_uv_to_vsel,
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};
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@ -238,7 +238,7 @@ static struct omap_volt_pmic_info omap4_core_volt_info = {
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.vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX,
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.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
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.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
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.pmic_reg = OMAP4_VDD_CORE_SR_VOLT_REG,
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.volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG,
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.vsel_to_uv = twl6030_vsel_to_uv,
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.uv_to_vsel = twl6030_uv_to_vsel,
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};
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@ -115,7 +115,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm,
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vc_valid = vc->common->valid;
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vc_bypass_val_reg = vc->common->bypass_val_reg;
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vc_bypass_value = (target_vsel << vc->common->data_shift) |
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(vdd->pmic_info->pmic_reg <<
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(vdd->pmic_info->volt_reg_addr <<
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vc->common->regaddr_shift) |
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(vdd->pmic_info->i2c_slave_addr <<
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vc->common->slaveaddr_shift);
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@ -264,7 +264,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
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vc_val = vdd->read_reg(vc->common->prm_mod,
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vc->common->smps_volra_reg);
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vc_val &= ~vc->smps_volra_mask;
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vc_val |= vdd->pmic_info->pmic_reg << vc->smps_volra_shift;
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vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift;
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vdd->write_reg(vc_val, vc->common->prm_mod,
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vc->common->smps_volra_reg);
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@ -96,6 +96,8 @@ struct omap_volt_data {
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* @step_size: PMIC voltage step size (in uv)
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* @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV.
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* @uv_to_vsel: PMIC API to convert voltage in uV to vsel value.
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* @volt_reg_addr: voltage configuration register address
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* @cmd_reg_addr: command (on, on-LP, ret, off) configuration register address
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*/
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struct omap_volt_pmic_info {
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int slew_rate;
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@ -112,7 +114,8 @@ struct omap_volt_pmic_info {
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u8 vp_vddmax;
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u8 vp_timeout_us;
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u8 i2c_slave_addr;
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u8 pmic_reg;
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u8 volt_reg_addr;
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u8 cmd_reg_addr;
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unsigned long (*vsel_to_uv) (const u8 vsel);
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u8 (*uv_to_vsel) (unsigned long uV);
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};
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