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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-15 08:44:14 +08:00

stmmac: use of_property_read_u32 instead of read_u8

Numbers in DT are stored in “cells” which are 32-bits
in size. of_property_read_u8 does not work properly
because of endianness problem.

This causes it to always return 0 with little-endian
architectures.

Fix it by using of_property_read_u32() OF API.

Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Bhadram Varka 2017-11-02 12:52:13 +05:30 committed by David S. Miller
parent 2f2b1ae24c
commit e73b49ebd9
2 changed files with 12 additions and 12 deletions

View File

@ -168,8 +168,8 @@ static void stmmac_mtl_setup(struct platform_device *pdev,
}
/* Processing RX queues common config */
if (of_property_read_u8(rx_node, "snps,rx-queues-to-use",
&plat->rx_queues_to_use))
if (of_property_read_u32(rx_node, "snps,rx-queues-to-use",
&plat->rx_queues_to_use))
plat->rx_queues_to_use = 1;
if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
@ -191,8 +191,8 @@ static void stmmac_mtl_setup(struct platform_device *pdev,
else
plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
if (of_property_read_u8(q_node, "snps,map-to-dma-channel",
&plat->rx_queues_cfg[queue].chan))
if (of_property_read_u32(q_node, "snps,map-to-dma-channel",
&plat->rx_queues_cfg[queue].chan))
plat->rx_queues_cfg[queue].chan = queue;
/* TODO: Dynamic mapping to be included in the future */
@ -222,8 +222,8 @@ static void stmmac_mtl_setup(struct platform_device *pdev,
}
/* Processing TX queues common config */
if (of_property_read_u8(tx_node, "snps,tx-queues-to-use",
&plat->tx_queues_to_use))
if (of_property_read_u32(tx_node, "snps,tx-queues-to-use",
&plat->tx_queues_to_use))
plat->tx_queues_to_use = 1;
if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
@ -244,8 +244,8 @@ static void stmmac_mtl_setup(struct platform_device *pdev,
if (queue >= plat->tx_queues_to_use)
break;
if (of_property_read_u8(q_node, "snps,weight",
&plat->tx_queues_cfg[queue].weight))
if (of_property_read_u32(q_node, "snps,weight",
&plat->tx_queues_cfg[queue].weight))
plat->tx_queues_cfg[queue].weight = 0x10 + queue;
if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {

View File

@ -126,14 +126,14 @@ struct stmmac_axi {
struct stmmac_rxq_cfg {
u8 mode_to_use;
u8 chan;
u32 chan;
u8 pkt_route;
bool use_prio;
u32 prio;
};
struct stmmac_txq_cfg {
u8 weight;
u32 weight;
u8 mode_to_use;
/* Credit Base Shaper parameters */
u32 send_slope;
@ -168,8 +168,8 @@ struct plat_stmmacenet_data {
int unicast_filter_entries;
int tx_fifo_size;
int rx_fifo_size;
u8 rx_queues_to_use;
u8 tx_queues_to_use;
u32 rx_queues_to_use;
u32 tx_queues_to_use;
u8 rx_sched_algorithm;
u8 tx_sched_algorithm;
struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES];