mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-19 18:53:52 +08:00
Third round of Renesas ARM based SoC cleanups for v3.12
* Remove global GPIO_NR definition from sh73a0 SoC * Remove unnecessary nfsroot settings from bootargs of kzm9d and armadillo800eva * Rename irq initialisation functions of r8a7779 SoC to make them consistent with other SoCs * Simplify irq initialisation of r8a7740 SoC * Add missing __initdata annotations to bockw board, and r8a7790 and r8a7779 SoCs * Refactor time initialisation and remove shmobile_init_time. - This affects the following boards: kzm9g, marzen, ape6evm, armadillo800eva and bockw - This affects the following SoCs: r8a7790, r8a7779, r7a7740, r7a73a4 * Cleanup device registration code of r8a7778 SoC -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJSAaigAAoJENfPZGlqN0++6dIQAJmaeKd/6QsHXy1Yc0h6knMk J2Jf1gL4lHM9FrsmFKVLqY6W6b0ctRPxBJXhpLEr2nfNnml924LHVKaxMXSnqvea Bn5U44L6X/Tpx04+I1KLkWRcLmej+1xULra15yZvb1YgtCueJcgzxAaZN+6vgIle NHK+gQsGqGnIIXAXawXF7p6v4SwSoUrcuqYd6IekmIKGYhxTNFKpyLZd6MY6I+Tp F14ulRnewAJWG5HrXbtLJlE2MOcd5IAvsRtMEizZO+3vmzf8esM+Fw9s39+2v0zg 8+lpucb68vaovjaP9TPgDTT9ddELL/0xrzfWnPFYWtaGiLOV//BEZYkOUhRqZy5I P55PZnlpjacSLDeJpsQxQGOx8RERhVKrNVycr1+XN0RnalLXI7lNepV7+j4cXUZw kFr2hEzRKwJ820rZNKmzGQEVLWypLtFxVdA9JBX3SP3vPe4QvuK1IWfb0VSs5L5s 7h8Cwvshb1jnULM1LhNobpQzQ2WTljghUiZU1omGOvQh8qzPn0+Iy9POVa5wBwCk PPYUJaL+aJYeikWMrxX757X1SYWKvuQ6pnNSEZSJm35HY4ESRg7gO/M56Ns1L62z lrcIf2OKbN8wUyqp1lZSg2HgJ+Du9N5mlSBVVw4sZBPN/Iukl+Jb0MznWhttEq2P dCb+bon+o5CS1+9xPGjI =Sbjt -----END PGP SIGNATURE----- Merge tag 'renesas-cleanup3-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/renesas From Simon Horman: Third round of Renesas ARM based SoC cleanups for v3.12 * Remove global GPIO_NR definition from sh73a0 SoC * Remove unnecessary nfsroot settings from bootargs of kzm9d and armadillo800eva * Rename irq initialisation functions of r8a7779 SoC to make them consistent with other SoCs * Simplify irq initialisation of r8a7740 SoC * Add missing __initdata annotations to bockw board, and r8a7790 and r8a7779 SoCs * Refactor time initialisation and remove shmobile_init_time. - This affects the following boards: kzm9g, marzen, ape6evm, armadillo800eva and bockw - This affects the following SoCs: r8a7790, r8a7779, r7a7740, r7a73a4 * Cleanup device registration code of r8a7778 SoC * tag 'renesas-cleanup3-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (45 commits) ARM: shmobile: sh73a0: Remove global GPIO_NR definition ARM: shmobile: kzm9d: remove nfsroot settings from bootargs ARM: shmobile: armadillo800eva: remove nfsroot settings from bootargs ARM: shmobile: r8a7779: move r8a7779_init_irq_xxx() to setup ARM: shmobile: r8a7740: move r8a7740_init_irq_of() to setup ARM: shmobile: bockw: add missing __initdata ARM: shmobile: r8a7790: add missing __initdata ARM: shmobile: r8a7779: add missing __initdata ARM: shmobile: Remove unused shmobile_init_time() ARM: shmobile: Use clocksource_of_init() on r8a7790 ARM: shmobile: Use default ->init_time() on KZM9G DT ref ARM: shmobile: Use default ->init_time() on Marzen DT ref ARM: shmobile: Use default ->init_time() on APE6EVM DT ref ARM: shmobile: Use default ->init_time() on APE6EVM ARM: shmobile: Use default ->init_time() on Armadillo DT ref ARM: shmobile: Use default ->init_time() on Bockw DT ref ARM: shmobile: Use default ->init_time() on Bockw ARM: shmobile: Use default ->init_time() on r8a7779 ARM: shmobile: Use default ->init_time() on r8a7778 ARM: shmobile: Use default ->init_time() on r8a7740 ... Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
e707bb338b
@ -186,12 +186,16 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
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|||||||
emev2-kzm9d-reference.dtb \
|
emev2-kzm9d-reference.dtb \
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r8a7740-armadillo800eva.dtb \
|
r8a7740-armadillo800eva.dtb \
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r8a7778-bockw.dtb \
|
r8a7778-bockw.dtb \
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|
r8a7778-bockw-reference.dtb \
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r8a7740-armadillo800eva-reference.dtb \
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r8a7740-armadillo800eva-reference.dtb \
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r8a7779-marzen.dtb \
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r8a7779-marzen-reference.dtb \
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r8a7779-marzen-reference.dtb \
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r8a7790-lager.dtb \
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r8a7790-lager.dtb \
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r8a7790-lager-reference.dtb \
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sh73a0-kzm9g.dtb \
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sh73a0-kzm9g.dtb \
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sh73a0-kzm9g-reference.dtb \
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sh73a0-kzm9g-reference.dtb \
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r8a73a4-ape6evm.dtb \
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r8a73a4-ape6evm.dtb \
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r8a73a4-ape6evm-reference.dtb \
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sh7372-mackerel.dtb
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sh7372-mackerel.dtb
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dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
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dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
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socfpga_vt.dtb
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socfpga_vt.dtb
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|
@ -21,7 +21,7 @@
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};
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};
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|
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chosen {
|
chosen {
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bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
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bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp";
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};
|
};
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|
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reg_1p8v: regulator@0 {
|
reg_1p8v: regulator@0 {
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|
@ -21,6 +21,6 @@
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};
|
};
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|
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chosen {
|
chosen {
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bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
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bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp";
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};
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};
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};
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};
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|
@ -46,6 +46,12 @@
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<0xe0020000 0x0100>;
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<0xe0020000 0x0100>;
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};
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};
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|
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|
pmu {
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compatible = "arm,cortex-a9-pmu";
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interrupts = <0 120 4>,
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<0 121 4>;
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|
};
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|
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sti@e0180000 {
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sti@e0180000 {
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compatible = "renesas,em-sti";
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compatible = "renesas,em-sti";
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reg = <0xe0180000 0x54>;
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reg = <0xe0180000 0x54>;
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65
arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
Normal file
65
arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
Normal file
@ -0,0 +1,65 @@
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|
/*
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* Device Tree Source for the APE6EVM board
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|
*
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|
* Copyright (C) 2013 Renesas Solutions Corp.
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|
*
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|
* This file is licensed under the terms of the GNU General Public License
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|
* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/dts-v1/;
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|
/include/ "r8a73a4.dtsi"
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|
/ {
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|
model = "APE6EVM";
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|
compatible = "renesas,ape6evm-reference", "renesas,r8a73a4";
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|
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|
chosen {
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bootargs = "console=ttySC0,115200 ignore_loglevel rw";
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};
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|
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x40000000>;
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};
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lbsc {
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compatible = "simple-bus";
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|
#address-cells = <1>;
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|
#size-cells = <1>;
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|
ranges = <0 0 0 0x80000000>;
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|
};
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|
};
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|
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|
&i2c5 {
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vdd_dvfs: max8973@1b {
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compatible = "maxim,max8973";
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reg = <0x1b>;
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|
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||||||
|
regulator-min-microvolt = <935000>;
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|
regulator-max-microvolt = <1200000>;
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|
regulator-boot-on;
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|
regulator-always-on;
|
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|
};
|
||||||
|
};
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|
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||||||
|
&cpu0 {
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|
cpu0-supply = <&vdd_dvfs>;
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|
operating-points = <
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|
/* kHz uV */
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|
1950000 1115000
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|
1462500 995000
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||||||
|
>;
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||||||
|
voltage-tolerance = <1>; /* 1% */
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|
};
|
||||||
|
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|
&pfc {
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|
pinctrl-0 = <&scifa0_pins>;
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|
pinctrl-names = "default";
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|
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|
scifa0_pins: scifa0 {
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|
renesas,groups = "scifa0_data";
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|
renesas,function = "scifa0";
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|
};
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||||||
|
};
|
@ -16,7 +16,7 @@
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compatible = "renesas,ape6evm", "renesas,r8a73a4";
|
compatible = "renesas,ape6evm", "renesas,r8a73a4";
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|
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||||||
chosen {
|
chosen {
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bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp";
|
bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
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};
|
};
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|
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memory@40000000 {
|
memory@40000000 {
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@ -16,7 +16,7 @@
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compatible = "renesas,armadillo800eva-reference", "renesas,r8a7740";
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compatible = "renesas,armadillo800eva-reference", "renesas,r8a7740";
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|
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||||||
chosen {
|
chosen {
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bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw";
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bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
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};
|
};
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|
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||||||
memory {
|
memory {
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||||||
|
@ -16,7 +16,7 @@
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|||||||
compatible = "renesas,armadillo800eva";
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compatible = "renesas,armadillo800eva";
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||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw";
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bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
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};
|
};
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|
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||||||
memory {
|
memory {
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||||||
|
@ -32,6 +32,11 @@
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<0xc2000000 0x1000>;
|
<0xc2000000 0x1000>;
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};
|
};
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||||||
|
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||||||
|
pmu {
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||||||
|
compatible = "arm,cortex-a9-pmu";
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|
interrupts = <0 83 4>;
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||||||
|
};
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||||||
|
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||||||
/* irqpin0: IRQ0 - IRQ7 */
|
/* irqpin0: IRQ0 - IRQ7 */
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irqpin0: irqpin@e6900000 {
|
irqpin0: irqpin@e6900000 {
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||||||
compatible = "renesas,intc-irqpin";
|
compatible = "renesas,intc-irqpin";
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@ -139,4 +144,11 @@
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0 72 0x4
|
0 72 0x4
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||||||
0 73 0x4>;
|
0 73 0x4>;
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||||||
};
|
};
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|
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||||||
|
tpu: pwm@e6600000 {
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||||||
|
compatible = "renesas,tpu-r8a7740", "renesas,tpu";
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||||||
|
reg = <0xe6600000 0x100>;
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||||||
|
status = "disabled";
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||||||
|
#pwm-cells = <3>;
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||||||
|
};
|
||||||
};
|
};
|
||||||
|
32
arch/arm/boot/dts/r8a7778-bockw-reference.dts
Normal file
32
arch/arm/boot/dts/r8a7778-bockw-reference.dts
Normal file
@ -0,0 +1,32 @@
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|||||||
|
/*
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||||||
|
* Reference Device Tree Source for the Bock-W board
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||||||
|
*
|
||||||
|
* Copyright (C) 2013 Renesas Solutions Corp.
|
||||||
|
* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
|
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|
*
|
||||||
|
* based on r8a7779
|
||||||
|
*
|
||||||
|
* Copyright (C) 2013 Renesas Solutions Corp.
|
||||||
|
* Copyright (C) 2013 Simon Horman
|
||||||
|
*
|
||||||
|
* This file is licensed under the terms of the GNU General Public License
|
||||||
|
* version 2. This program is licensed "as is" without any warranty of any
|
||||||
|
* kind, whether express or implied.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
/include/ "r8a7778.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "bockw";
|
||||||
|
compatible = "renesas,bockw-reference", "renesas,r8a7778";
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
bootargs = "console=ttySC0,115200 ignore_loglevel rw";
|
||||||
|
};
|
||||||
|
|
||||||
|
memory {
|
||||||
|
device_type = "memory";
|
||||||
|
reg = <0x60000000 0x10000000>;
|
||||||
|
};
|
||||||
|
};
|
@ -22,7 +22,7 @@
|
|||||||
compatible = "renesas,bockw", "renesas,r8a7778";
|
compatible = "renesas,bockw", "renesas,r8a7778";
|
||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs";
|
bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs rw";
|
||||||
};
|
};
|
||||||
|
|
||||||
memory {
|
memory {
|
||||||
|
@ -17,7 +17,7 @@
|
|||||||
compatible = "renesas,marzen-reference", "renesas,r8a7779";
|
compatible = "renesas,marzen-reference", "renesas,r8a7779";
|
||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on";
|
bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on rw";
|
||||||
};
|
};
|
||||||
|
|
||||||
memory {
|
memory {
|
||||||
|
27
arch/arm/boot/dts/r8a7779-marzen.dts
Normal file
27
arch/arm/boot/dts/r8a7779-marzen.dts
Normal file
@ -0,0 +1,27 @@
|
|||||||
|
/*
|
||||||
|
* Device Tree Source for the Marzen board
|
||||||
|
*
|
||||||
|
* Copyright (C) 2013 Renesas Solutions Corp.
|
||||||
|
* Copyright (C) 2013 Simon Horman
|
||||||
|
*
|
||||||
|
* This file is licensed under the terms of the GNU General Public License
|
||||||
|
* version 2. This program is licensed "as is" without any warranty of any
|
||||||
|
* kind, whether express or implied.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
/include/ "r8a7779.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "marzen";
|
||||||
|
compatible = "renesas,marzen", "renesas,r8a7779";
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on";
|
||||||
|
};
|
||||||
|
|
||||||
|
memory {
|
||||||
|
device_type = "memory";
|
||||||
|
reg = <0x60000000 0x40000000>;
|
||||||
|
};
|
||||||
|
};
|
45
arch/arm/boot/dts/r8a7790-lager-reference.dts
Normal file
45
arch/arm/boot/dts/r8a7790-lager-reference.dts
Normal file
@ -0,0 +1,45 @@
|
|||||||
|
/*
|
||||||
|
* Device Tree Source for the Lager board
|
||||||
|
*
|
||||||
|
* Copyright (C) 2013 Renesas Solutions Corp.
|
||||||
|
*
|
||||||
|
* This file is licensed under the terms of the GNU General Public License
|
||||||
|
* version 2. This program is licensed "as is" without any warranty of any
|
||||||
|
* kind, whether express or implied.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
/include/ "r8a7790.dtsi"
|
||||||
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Lager";
|
||||||
|
compatible = "renesas,lager-reference", "renesas,r8a7790";
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
bootargs = "console=ttySC6,115200 ignore_loglevel rw";
|
||||||
|
};
|
||||||
|
|
||||||
|
memory@40000000 {
|
||||||
|
device_type = "memory";
|
||||||
|
reg = <0 0x40000000 0 0x80000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
lbsc {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
leds {
|
||||||
|
compatible = "gpio-leds";
|
||||||
|
led6 {
|
||||||
|
gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
led7 {
|
||||||
|
gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
led8 {
|
||||||
|
gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
@ -16,7 +16,7 @@
|
|||||||
compatible = "renesas,lager", "renesas,r8a7790";
|
compatible = "renesas,lager", "renesas,r8a7790";
|
||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
bootargs = "console=ttySC6,115200 ignore_loglevel";
|
bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
||||||
};
|
};
|
||||||
|
|
||||||
memory@40000000 {
|
memory@40000000 {
|
||||||
|
@ -32,7 +32,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200";
|
bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200 rw";
|
||||||
};
|
};
|
||||||
|
|
||||||
memory {
|
memory {
|
||||||
|
@ -16,7 +16,7 @@
|
|||||||
compatible = "renesas,kzm9g", "renesas,sh73a0";
|
compatible = "renesas,kzm9g", "renesas,sh73a0";
|
||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200";
|
bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200 rw";
|
||||||
};
|
};
|
||||||
|
|
||||||
memory {
|
memory {
|
||||||
|
@ -38,6 +38,12 @@
|
|||||||
<0xf0000100 0x100>;
|
<0xf0000100 0x100>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
pmu {
|
||||||
|
compatible = "arm,cortex-a9-pmu";
|
||||||
|
interrupts = <0 55 4>,
|
||||||
|
<0 56 4>;
|
||||||
|
};
|
||||||
|
|
||||||
irqpin0: irqpin@e6900000 {
|
irqpin0: irqpin@e6900000 {
|
||||||
compatible = "renesas,intc-irqpin";
|
compatible = "renesas,intc-irqpin";
|
||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <2>;
|
||||||
|
@ -76,6 +76,17 @@ config MACH_APE6EVM
|
|||||||
depends on ARCH_R8A73A4
|
depends on ARCH_R8A73A4
|
||||||
select USE_OF
|
select USE_OF
|
||||||
|
|
||||||
|
config MACH_APE6EVM_REFERENCE
|
||||||
|
bool "APE6EVM board - Reference Device Tree Implementation"
|
||||||
|
depends on ARCH_R8A73A4
|
||||||
|
select USE_OF
|
||||||
|
---help---
|
||||||
|
Use reference implementation of APE6EVM board support
|
||||||
|
which makes a greater use of device tree at the expense
|
||||||
|
of not supporting a number of devices.
|
||||||
|
|
||||||
|
This is intended to aid developers
|
||||||
|
|
||||||
config MACH_MACKEREL
|
config MACH_MACKEREL
|
||||||
bool "mackerel board"
|
bool "mackerel board"
|
||||||
depends on ARCH_SH7372
|
depends on ARCH_SH7372
|
||||||
@ -113,11 +124,26 @@ config MACH_BOCKW
|
|||||||
select RENESAS_INTC_IRQPIN
|
select RENESAS_INTC_IRQPIN
|
||||||
select USE_OF
|
select USE_OF
|
||||||
|
|
||||||
|
config MACH_BOCKW_REFERENCE
|
||||||
|
bool "BOCK-W - Reference Device Tree Implementation"
|
||||||
|
depends on ARCH_R8A7778
|
||||||
|
select ARCH_REQUIRE_GPIOLIB
|
||||||
|
select RENESAS_INTC_IRQPIN
|
||||||
|
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||||
|
select USE_OF
|
||||||
|
---help---
|
||||||
|
Use reference implementation of BockW board support
|
||||||
|
which makes use of device tree at the expense
|
||||||
|
of not supporting a number of devices.
|
||||||
|
|
||||||
|
This is intended to aid developers
|
||||||
|
|
||||||
config MACH_MARZEN
|
config MACH_MARZEN
|
||||||
bool "MARZEN board"
|
bool "MARZEN board"
|
||||||
depends on ARCH_R8A7779
|
depends on ARCH_R8A7779
|
||||||
select ARCH_REQUIRE_GPIOLIB
|
select ARCH_REQUIRE_GPIOLIB
|
||||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||||
|
select USE_OF
|
||||||
|
|
||||||
config MACH_MARZEN_REFERENCE
|
config MACH_MARZEN_REFERENCE
|
||||||
bool "MARZEN board - Reference Device Tree Implementation"
|
bool "MARZEN board - Reference Device Tree Implementation"
|
||||||
@ -137,6 +163,17 @@ config MACH_LAGER
|
|||||||
depends on ARCH_R8A7790
|
depends on ARCH_R8A7790
|
||||||
select USE_OF
|
select USE_OF
|
||||||
|
|
||||||
|
config MACH_LAGER_REFERENCE
|
||||||
|
bool "Lager board - Reference Device Tree Implementation"
|
||||||
|
depends on ARCH_R8A7790
|
||||||
|
select USE_OF
|
||||||
|
---help---
|
||||||
|
Use reference implementation of Lager board support
|
||||||
|
which makes use of device tree at the expense
|
||||||
|
of not supporting a number of devices.
|
||||||
|
|
||||||
|
This is intended to aid developers
|
||||||
|
|
||||||
config MACH_KZM9D
|
config MACH_KZM9D
|
||||||
bool "KZM9D board"
|
bool "KZM9D board"
|
||||||
depends on ARCH_EMEV2
|
depends on ARCH_EMEV2
|
||||||
|
@ -9,9 +9,9 @@ obj-y := timer.o console.o clock.o
|
|||||||
obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7372.o intc-sh7372.o
|
obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7372.o intc-sh7372.o
|
||||||
obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o
|
obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o
|
||||||
obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o clock-r8a73a4.o
|
obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o clock-r8a73a4.o
|
||||||
obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o
|
obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o clock-r8a7740.o
|
||||||
obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o clock-r8a7778.o
|
obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o clock-r8a7778.o
|
||||||
obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o clock-r8a7779.o intc-r8a7779.o
|
obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o clock-r8a7779.o
|
||||||
obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o clock-r8a7790.o
|
obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o clock-r8a7790.o
|
||||||
obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o clock-emev2.o
|
obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o clock-emev2.o
|
||||||
|
|
||||||
@ -34,11 +34,14 @@ obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
|
|||||||
|
|
||||||
# Board objects
|
# Board objects
|
||||||
obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
|
obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
|
||||||
|
obj-$(CONFIG_MACH_APE6EVM_REFERENCE) += board-ape6evm-reference.o
|
||||||
obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
|
obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
|
||||||
obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
|
obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
|
||||||
|
obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o
|
||||||
obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
|
obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
|
||||||
obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o
|
obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o
|
||||||
obj-$(CONFIG_MACH_LAGER) += board-lager.o
|
obj-$(CONFIG_MACH_LAGER) += board-lager.o
|
||||||
|
obj-$(CONFIG_MACH_LAGER_REFERENCE) += board-lager-reference.o
|
||||||
obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
|
obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
|
||||||
obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
|
obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
|
||||||
obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o
|
obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o
|
||||||
|
@ -1,14 +1,17 @@
|
|||||||
# per-board load address for uImage
|
# per-board load address for uImage
|
||||||
loadaddr-y :=
|
loadaddr-y :=
|
||||||
loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000
|
loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000
|
||||||
|
loadaddr-$(CONFIG_MACH_APE6EVM_REFERENCE) += 0x40008000
|
||||||
loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
|
loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
|
||||||
loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
|
loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
|
||||||
loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
|
loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
|
||||||
|
loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
|
||||||
loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
|
loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
|
||||||
loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
|
loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
|
||||||
loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
|
loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
|
||||||
loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
|
loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
|
||||||
loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
|
loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
|
||||||
|
loadaddr-$(CONFIG_MACH_LAGER_REFERENCE) += 0x40008000
|
||||||
loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000
|
loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000
|
||||||
loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000
|
loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000
|
||||||
loadaddr-$(CONFIG_MACH_MARZEN_REFERENCE) += 0x60008000
|
loadaddr-$(CONFIG_MACH_MARZEN_REFERENCE) += 0x60008000
|
||||||
|
63
arch/arm/mach-shmobile/board-ape6evm-reference.c
Normal file
63
arch/arm/mach-shmobile/board-ape6evm-reference.c
Normal file
@ -0,0 +1,63 @@
|
|||||||
|
/*
|
||||||
|
* APE6EVM board support
|
||||||
|
*
|
||||||
|
* Copyright (C) 2013 Renesas Solutions Corp.
|
||||||
|
* Copyright (C) 2013 Magnus Damm
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; version 2 of the License.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/gpio.h>
|
||||||
|
#include <linux/kernel.h>
|
||||||
|
#include <linux/of_platform.h>
|
||||||
|
#include <linux/pinctrl/machine.h>
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
#include <linux/sh_clk.h>
|
||||||
|
#include <mach/common.h>
|
||||||
|
#include <mach/r8a73a4.h>
|
||||||
|
#include <asm/mach-types.h>
|
||||||
|
#include <asm/mach/arch.h>
|
||||||
|
|
||||||
|
static void __init ape6evm_add_standard_devices(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
struct clk *parent;
|
||||||
|
struct clk *mp;
|
||||||
|
|
||||||
|
r8a73a4_clock_init();
|
||||||
|
|
||||||
|
/* MP clock parent = extal2 */
|
||||||
|
parent = clk_get(NULL, "extal2");
|
||||||
|
mp = clk_get(NULL, "mp");
|
||||||
|
BUG_ON(IS_ERR(parent) || IS_ERR(mp));
|
||||||
|
|
||||||
|
clk_set_parent(mp, parent);
|
||||||
|
clk_put(parent);
|
||||||
|
clk_put(mp);
|
||||||
|
|
||||||
|
r8a73a4_add_dt_devices();
|
||||||
|
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||||
|
platform_device_register_simple("cpufreq-cpu0", -1, NULL, 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
static const char *ape6evm_boards_compat_dt[] __initdata = {
|
||||||
|
"renesas,ape6evm-reference",
|
||||||
|
NULL,
|
||||||
|
};
|
||||||
|
|
||||||
|
DT_MACHINE_START(APE6EVM_DT, "ape6evm")
|
||||||
|
.init_early = r8a73a4_init_delay,
|
||||||
|
.init_machine = ape6evm_add_standard_devices,
|
||||||
|
.dt_compat = ape6evm_boards_compat_dt,
|
||||||
|
MACHINE_END
|
@ -102,7 +102,6 @@ static const char *ape6evm_boards_compat_dt[] __initdata = {
|
|||||||
|
|
||||||
DT_MACHINE_START(APE6EVM_DT, "ape6evm")
|
DT_MACHINE_START(APE6EVM_DT, "ape6evm")
|
||||||
.init_early = r8a73a4_init_delay,
|
.init_early = r8a73a4_init_delay,
|
||||||
.init_time = shmobile_timer_init,
|
|
||||||
.init_machine = ape6evm_add_standard_devices,
|
.init_machine = ape6evm_add_standard_devices,
|
||||||
.dt_compat = ape6evm_boards_compat_dt,
|
.dt_compat = ape6evm_boards_compat_dt,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
@ -206,7 +206,6 @@ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva-reference")
|
|||||||
.init_early = r8a7740_init_delay,
|
.init_early = r8a7740_init_delay,
|
||||||
.init_irq = r8a7740_init_irq_of,
|
.init_irq = r8a7740_init_irq_of,
|
||||||
.init_machine = eva_init,
|
.init_machine = eva_init,
|
||||||
.init_time = shmobile_timer_init,
|
|
||||||
.init_late = shmobile_init_late,
|
.init_late = shmobile_init_late,
|
||||||
.dt_compat = eva_boards_compat_dt,
|
.dt_compat = eva_boards_compat_dt,
|
||||||
.restart = eva_restart,
|
.restart = eva_restart,
|
||||||
|
@ -1312,7 +1312,7 @@ static const char *eva_boards_compat_dt[] __initdata = {
|
|||||||
DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
|
DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
|
||||||
.map_io = r8a7740_map_io,
|
.map_io = r8a7740_map_io,
|
||||||
.init_early = eva_add_early_devices,
|
.init_early = eva_add_early_devices,
|
||||||
.init_irq = r8a7740_init_irq,
|
.init_irq = r8a7740_init_irq_of,
|
||||||
.init_machine = eva_init,
|
.init_machine = eva_init,
|
||||||
.init_late = shmobile_init_late,
|
.init_late = shmobile_init_late,
|
||||||
.init_time = eva_earlytimer_init,
|
.init_time = eva_earlytimer_init,
|
||||||
|
61
arch/arm/mach-shmobile/board-bockw-reference.c
Normal file
61
arch/arm/mach-shmobile/board-bockw-reference.c
Normal file
@ -0,0 +1,61 @@
|
|||||||
|
/*
|
||||||
|
* Bock-W board support
|
||||||
|
*
|
||||||
|
* Copyright (C) 2013 Renesas Solutions Corp.
|
||||||
|
* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; version 2 of the License.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/of_platform.h>
|
||||||
|
#include <linux/pinctrl/machine.h>
|
||||||
|
#include <mach/common.h>
|
||||||
|
#include <mach/r8a7778.h>
|
||||||
|
#include <asm/mach/arch.h>
|
||||||
|
|
||||||
|
/*
|
||||||
|
* see board-bock.c for checking detail of dip-switch
|
||||||
|
*/
|
||||||
|
|
||||||
|
static const struct pinctrl_map bockw_pinctrl_map[] = {
|
||||||
|
/* SCIF0 */
|
||||||
|
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
|
||||||
|
"scif0_data_a", "scif0"),
|
||||||
|
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
|
||||||
|
"scif0_ctrl", "scif0"),
|
||||||
|
};
|
||||||
|
|
||||||
|
static void __init bockw_init(void)
|
||||||
|
{
|
||||||
|
r8a7778_clock_init();
|
||||||
|
|
||||||
|
pinctrl_register_mappings(bockw_pinctrl_map,
|
||||||
|
ARRAY_SIZE(bockw_pinctrl_map));
|
||||||
|
r8a7778_pinmux_init();
|
||||||
|
r8a7778_add_dt_devices();
|
||||||
|
|
||||||
|
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||||
|
}
|
||||||
|
|
||||||
|
static const char *bockw_boards_compat_dt[] __initdata = {
|
||||||
|
"renesas,bockw-reference",
|
||||||
|
NULL,
|
||||||
|
};
|
||||||
|
|
||||||
|
DT_MACHINE_START(BOCKW_DT, "bockw")
|
||||||
|
.init_early = r8a7778_init_delay,
|
||||||
|
.init_irq = r8a7778_init_irq_dt,
|
||||||
|
.init_machine = bockw_init,
|
||||||
|
.dt_compat = bockw_boards_compat_dt,
|
||||||
|
MACHINE_END
|
@ -20,8 +20,11 @@
|
|||||||
|
|
||||||
#include <linux/mfd/tmio.h>
|
#include <linux/mfd/tmio.h>
|
||||||
#include <linux/mmc/host.h>
|
#include <linux/mmc/host.h>
|
||||||
|
#include <linux/mmc/sh_mobile_sdhi.h>
|
||||||
|
#include <linux/mmc/sh_mmcif.h>
|
||||||
#include <linux/mtd/partitions.h>
|
#include <linux/mtd/partitions.h>
|
||||||
#include <linux/pinctrl/machine.h>
|
#include <linux/pinctrl/machine.h>
|
||||||
|
#include <linux/platform_data/usb-rcar-phy.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/regulator/fixed.h>
|
#include <linux/regulator/fixed.h>
|
||||||
#include <linux/regulator/machine.h>
|
#include <linux/regulator/machine.h>
|
||||||
@ -64,28 +67,38 @@ static struct regulator_consumer_supply dummy_supplies[] = {
|
|||||||
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
|
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct smsc911x_platform_config smsc911x_data = {
|
static struct smsc911x_platform_config smsc911x_data __initdata = {
|
||||||
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
|
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
|
||||||
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
|
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
|
||||||
.flags = SMSC911X_USE_32BIT,
|
.flags = SMSC911X_USE_32BIT,
|
||||||
.phy_interface = PHY_INTERFACE_MODE_MII,
|
.phy_interface = PHY_INTERFACE_MODE_MII,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct resource smsc911x_resources[] = {
|
static struct resource smsc911x_resources[] __initdata = {
|
||||||
DEFINE_RES_MEM(0x18300000, 0x1000),
|
DEFINE_RES_MEM(0x18300000, 0x1000),
|
||||||
DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
|
DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
|
||||||
};
|
};
|
||||||
|
|
||||||
/* USB */
|
/* USB */
|
||||||
|
static struct resource usb_phy_resources[] __initdata = {
|
||||||
|
DEFINE_RES_MEM(0xffe70800, 0x100),
|
||||||
|
DEFINE_RES_MEM(0xffe76000, 0x100),
|
||||||
|
};
|
||||||
|
|
||||||
static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
|
static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
|
||||||
|
|
||||||
/* SDHI */
|
/* SDHI */
|
||||||
static struct sh_mobile_sdhi_info sdhi0_info = {
|
static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
|
||||||
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
|
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
|
||||||
.tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
|
.tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
|
||||||
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
|
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static struct resource sdhi0_resources[] __initdata = {
|
||||||
|
DEFINE_RES_MEM(0xFFE4C000, 0x100),
|
||||||
|
DEFINE_RES_IRQ(gic_iid(0x77)),
|
||||||
|
};
|
||||||
|
|
||||||
static struct sh_eth_plat_data ether_platform_data __initdata = {
|
static struct sh_eth_plat_data ether_platform_data __initdata = {
|
||||||
.phy = 0x01,
|
.phy = 0x01,
|
||||||
.edmac_endian = EDMAC_LITTLE_ENDIAN,
|
.edmac_endian = EDMAC_LITTLE_ENDIAN,
|
||||||
@ -135,7 +148,12 @@ static struct spi_board_info spi_board_info[] __initdata = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
/* MMC */
|
/* MMC */
|
||||||
static struct sh_mmcif_plat_data sh_mmcif_plat = {
|
static struct resource mmc_resources[] __initdata = {
|
||||||
|
DEFINE_RES_MEM(0xffe4e000, 0x100),
|
||||||
|
DEFINE_RES_IRQ(gic_iid(0x5d)),
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
|
||||||
.sup_pclk = 0,
|
.sup_pclk = 0,
|
||||||
.ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
|
.ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
|
||||||
.caps = MMC_CAP_4_BIT_DATA |
|
.caps = MMC_CAP_4_BIT_DATA |
|
||||||
@ -187,11 +205,7 @@ static void __init bockw_init(void)
|
|||||||
r8a7778_clock_init();
|
r8a7778_clock_init();
|
||||||
r8a7778_init_irq_extpin(1);
|
r8a7778_init_irq_extpin(1);
|
||||||
r8a7778_add_standard_devices();
|
r8a7778_add_standard_devices();
|
||||||
r8a7778_add_usb_phy_device(&usb_phy_platform_data);
|
|
||||||
r8a7778_add_ether_device(ðer_platform_data);
|
r8a7778_add_ether_device(ðer_platform_data);
|
||||||
r8a7778_add_i2c_device(0);
|
|
||||||
r8a7778_add_hspi_device(0);
|
|
||||||
r8a7778_add_mmc_device(&sh_mmcif_plat);
|
|
||||||
|
|
||||||
i2c_register_board_info(0, i2c0_devices,
|
i2c_register_board_info(0, i2c0_devices,
|
||||||
ARRAY_SIZE(i2c0_devices));
|
ARRAY_SIZE(i2c0_devices));
|
||||||
@ -201,6 +215,19 @@ static void __init bockw_init(void)
|
|||||||
ARRAY_SIZE(bockw_pinctrl_map));
|
ARRAY_SIZE(bockw_pinctrl_map));
|
||||||
r8a7778_pinmux_init();
|
r8a7778_pinmux_init();
|
||||||
|
|
||||||
|
platform_device_register_resndata(
|
||||||
|
&platform_bus, "sh_mmcif", -1,
|
||||||
|
mmc_resources, ARRAY_SIZE(mmc_resources),
|
||||||
|
&sh_mmcif_plat, sizeof(struct sh_mmcif_plat_data));
|
||||||
|
|
||||||
|
platform_device_register_resndata(
|
||||||
|
&platform_bus, "rcar_usb_phy", -1,
|
||||||
|
usb_phy_resources,
|
||||||
|
ARRAY_SIZE(usb_phy_resources),
|
||||||
|
&usb_phy_platform_data,
|
||||||
|
sizeof(struct rcar_phy_platform_data));
|
||||||
|
|
||||||
|
|
||||||
/* for SMSC */
|
/* for SMSC */
|
||||||
base = ioremap_nocache(FPGA, SZ_1M);
|
base = ioremap_nocache(FPGA, SZ_1M);
|
||||||
if (base) {
|
if (base) {
|
||||||
@ -236,7 +263,10 @@ static void __init bockw_init(void)
|
|||||||
iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
|
iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
|
||||||
iounmap(base);
|
iounmap(base);
|
||||||
|
|
||||||
r8a7778_sdhi_init(0, &sdhi0_info);
|
platform_device_register_resndata(
|
||||||
|
&platform_bus, "sh_mobile_sdhi", 0,
|
||||||
|
sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
|
||||||
|
&sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -249,7 +279,6 @@ DT_MACHINE_START(BOCKW_DT, "bockw")
|
|||||||
.init_early = r8a7778_init_delay,
|
.init_early = r8a7778_init_delay,
|
||||||
.init_irq = r8a7778_init_irq_dt,
|
.init_irq = r8a7778_init_irq_dt,
|
||||||
.init_machine = bockw_init,
|
.init_machine = bockw_init,
|
||||||
.init_time = shmobile_timer_init,
|
|
||||||
.dt_compat = bockw_boards_compat_dt,
|
.dt_compat = bockw_boards_compat_dt,
|
||||||
.init_late = r8a7778_init_late,
|
.init_late = r8a7778_init_late,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
@ -99,6 +99,5 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g-reference")
|
|||||||
.init_early = sh73a0_init_delay,
|
.init_early = sh73a0_init_delay,
|
||||||
.nr_irqs = NR_IRQS_LEGACY,
|
.nr_irqs = NR_IRQS_LEGACY,
|
||||||
.init_machine = kzm_init,
|
.init_machine = kzm_init,
|
||||||
.init_time = shmobile_timer_init,
|
|
||||||
.dt_compat = kzm9g_boards_compat_dt,
|
.dt_compat = kzm9g_boards_compat_dt,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
@ -54,14 +54,14 @@
|
|||||||
/*
|
/*
|
||||||
* external GPIO
|
* external GPIO
|
||||||
*/
|
*/
|
||||||
#define GPIO_PCF8575_BASE (GPIO_NR)
|
#define GPIO_PCF8575_BASE (310)
|
||||||
#define GPIO_PCF8575_PORT10 (GPIO_NR + 8)
|
#define GPIO_PCF8575_PORT10 (GPIO_PCF8575_BASE + 8)
|
||||||
#define GPIO_PCF8575_PORT11 (GPIO_NR + 9)
|
#define GPIO_PCF8575_PORT11 (GPIO_PCF8575_BASE + 9)
|
||||||
#define GPIO_PCF8575_PORT12 (GPIO_NR + 10)
|
#define GPIO_PCF8575_PORT12 (GPIO_PCF8575_BASE + 10)
|
||||||
#define GPIO_PCF8575_PORT13 (GPIO_NR + 11)
|
#define GPIO_PCF8575_PORT13 (GPIO_PCF8575_BASE + 11)
|
||||||
#define GPIO_PCF8575_PORT14 (GPIO_NR + 12)
|
#define GPIO_PCF8575_PORT14 (GPIO_PCF8575_BASE + 12)
|
||||||
#define GPIO_PCF8575_PORT15 (GPIO_NR + 13)
|
#define GPIO_PCF8575_PORT15 (GPIO_PCF8575_BASE + 13)
|
||||||
#define GPIO_PCF8575_PORT16 (GPIO_NR + 14)
|
#define GPIO_PCF8575_PORT16 (GPIO_PCF8575_BASE + 14)
|
||||||
|
|
||||||
/* Dummy supplies, where voltage doesn't matter */
|
/* Dummy supplies, where voltage doesn't matter */
|
||||||
static struct regulator_consumer_supply dummy_supplies[] = {
|
static struct regulator_consumer_supply dummy_supplies[] = {
|
||||||
|
45
arch/arm/mach-shmobile/board-lager-reference.c
Normal file
45
arch/arm/mach-shmobile/board-lager-reference.c
Normal file
@ -0,0 +1,45 @@
|
|||||||
|
/*
|
||||||
|
* Lager board support - Reference DT implementation
|
||||||
|
*
|
||||||
|
* Copyright (C) 2013 Renesas Solutions Corp.
|
||||||
|
* Copyright (C) 2013 Simon Horman
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; version 2 of the License.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/init.h>
|
||||||
|
#include <linux/of_platform.h>
|
||||||
|
#include <mach/r8a7790.h>
|
||||||
|
#include <asm/mach/arch.h>
|
||||||
|
|
||||||
|
static void __init lager_add_standard_devices(void)
|
||||||
|
{
|
||||||
|
/* clocks are setup late during boot in the case of DT */
|
||||||
|
r8a7790_clock_init();
|
||||||
|
|
||||||
|
r8a7790_add_dt_devices();
|
||||||
|
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||||
|
}
|
||||||
|
|
||||||
|
static const char *lager_boards_compat_dt[] __initdata = {
|
||||||
|
"renesas,lager-reference",
|
||||||
|
NULL,
|
||||||
|
};
|
||||||
|
|
||||||
|
DT_MACHINE_START(LAGER_DT, "lager")
|
||||||
|
.init_early = r8a7790_init_delay,
|
||||||
|
.init_machine = lager_add_standard_devices,
|
||||||
|
.init_time = r8a7790_timer_init,
|
||||||
|
.dt_compat = lager_boards_compat_dt,
|
||||||
|
MACHINE_END
|
@ -70,6 +70,5 @@ DT_MACHINE_START(MARZEN, "marzen")
|
|||||||
.nr_irqs = NR_IRQS_LEGACY,
|
.nr_irqs = NR_IRQS_LEGACY,
|
||||||
.init_irq = r8a7779_init_irq_dt,
|
.init_irq = r8a7779_init_irq_dt,
|
||||||
.init_machine = marzen_init,
|
.init_machine = marzen_init,
|
||||||
.init_time = shmobile_timer_init,
|
|
||||||
.dt_compat = marzen_boards_compat_dt,
|
.dt_compat = marzen_boards_compat_dt,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
@ -257,13 +257,18 @@ static void __init marzen_init(void)
|
|||||||
platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
|
platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
|
||||||
}
|
}
|
||||||
|
|
||||||
MACHINE_START(MARZEN, "marzen")
|
static const char *marzen_boards_compat_dt[] __initdata = {
|
||||||
|
"renesas,marzen",
|
||||||
|
NULL,
|
||||||
|
};
|
||||||
|
|
||||||
|
DT_MACHINE_START(MARZEN, "marzen")
|
||||||
.smp = smp_ops(r8a7779_smp_ops),
|
.smp = smp_ops(r8a7779_smp_ops),
|
||||||
.map_io = r8a7779_map_io,
|
.map_io = r8a7779_map_io,
|
||||||
.init_early = r8a7779_add_early_devices,
|
.init_early = r8a7779_add_early_devices,
|
||||||
.nr_irqs = NR_IRQS_LEGACY,
|
.init_irq = r8a7779_init_irq_dt,
|
||||||
.init_irq = r8a7779_init_irq,
|
|
||||||
.init_machine = marzen_init,
|
.init_machine = marzen_init,
|
||||||
.init_late = r8a7779_init_late,
|
.init_late = r8a7779_init_late,
|
||||||
|
.dt_compat = marzen_boards_compat_dt,
|
||||||
.init_time = r8a7779_earlytimer_init,
|
.init_time = r8a7779_earlytimer_init,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
@ -2,7 +2,6 @@
|
|||||||
#define __ARCH_MACH_COMMON_H
|
#define __ARCH_MACH_COMMON_H
|
||||||
|
|
||||||
extern void shmobile_earlytimer_init(void);
|
extern void shmobile_earlytimer_init(void);
|
||||||
extern void shmobile_timer_init(void);
|
|
||||||
extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
|
extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
|
||||||
unsigned int mult, unsigned int div);
|
unsigned int mult, unsigned int div);
|
||||||
struct twd_local_timer;
|
struct twd_local_timer;
|
||||||
|
@ -2,6 +2,7 @@
|
|||||||
#define __ASM_R8A73A4_H__
|
#define __ASM_R8A73A4_H__
|
||||||
|
|
||||||
void r8a73a4_add_standard_devices(void);
|
void r8a73a4_add_standard_devices(void);
|
||||||
|
void r8a73a4_add_dt_devices(void);
|
||||||
void r8a73a4_clock_init(void);
|
void r8a73a4_clock_init(void);
|
||||||
void r8a73a4_pinmux_init(void);
|
void r8a73a4_pinmux_init(void);
|
||||||
void r8a73a4_init_delay(void);
|
void r8a73a4_init_delay(void);
|
||||||
|
@ -48,7 +48,6 @@ enum {
|
|||||||
|
|
||||||
extern void r8a7740_meram_workaround(void);
|
extern void r8a7740_meram_workaround(void);
|
||||||
extern void r8a7740_init_delay(void);
|
extern void r8a7740_init_delay(void);
|
||||||
extern void r8a7740_init_irq(void);
|
|
||||||
extern void r8a7740_init_irq_of(void);
|
extern void r8a7740_init_irq_of(void);
|
||||||
extern void r8a7740_map_io(void);
|
extern void r8a7740_map_io(void);
|
||||||
extern void r8a7740_add_early_devices(void);
|
extern void r8a7740_add_early_devices(void);
|
||||||
|
@ -18,18 +18,12 @@
|
|||||||
#ifndef __ASM_R8A7778_H__
|
#ifndef __ASM_R8A7778_H__
|
||||||
#define __ASM_R8A7778_H__
|
#define __ASM_R8A7778_H__
|
||||||
|
|
||||||
#include <linux/mmc/sh_mmcif.h>
|
|
||||||
#include <linux/mmc/sh_mobile_sdhi.h>
|
|
||||||
#include <linux/sh_eth.h>
|
#include <linux/sh_eth.h>
|
||||||
#include <linux/platform_data/usb-rcar-phy.h>
|
|
||||||
|
|
||||||
extern void r8a7778_add_standard_devices(void);
|
extern void r8a7778_add_standard_devices(void);
|
||||||
extern void r8a7778_add_standard_devices_dt(void);
|
extern void r8a7778_add_standard_devices_dt(void);
|
||||||
extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
|
extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
|
||||||
extern void r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
|
extern void r8a7778_add_dt_devices(void);
|
||||||
extern void r8a7778_add_i2c_device(int id);
|
|
||||||
extern void r8a7778_add_hspi_device(int id);
|
|
||||||
extern void r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info);
|
|
||||||
|
|
||||||
extern void r8a7778_init_late(void);
|
extern void r8a7778_init_late(void);
|
||||||
extern void r8a7778_init_delay(void);
|
extern void r8a7778_init_delay(void);
|
||||||
@ -37,6 +31,5 @@ extern void r8a7778_init_irq_dt(void);
|
|||||||
extern void r8a7778_clock_init(void);
|
extern void r8a7778_clock_init(void);
|
||||||
extern void r8a7778_init_irq_extpin(int irlm);
|
extern void r8a7778_init_irq_extpin(int irlm);
|
||||||
extern void r8a7778_pinmux_init(void);
|
extern void r8a7778_pinmux_init(void);
|
||||||
extern void r8a7778_sdhi_init(int id, struct sh_mobile_sdhi_info *info);
|
|
||||||
|
|
||||||
#endif /* __ASM_R8A7778_H__ */
|
#endif /* __ASM_R8A7778_H__ */
|
||||||
|
@ -24,7 +24,6 @@ static inline struct r8a7779_pm_ch *to_r8a7779_ch(struct generic_pm_domain *d)
|
|||||||
}
|
}
|
||||||
|
|
||||||
extern void r8a7779_init_delay(void);
|
extern void r8a7779_init_delay(void);
|
||||||
extern void r8a7779_init_irq(void);
|
|
||||||
extern void r8a7779_init_irq_extpin(int irlm);
|
extern void r8a7779_init_irq_extpin(int irlm);
|
||||||
extern void r8a7779_init_irq_dt(void);
|
extern void r8a7779_init_irq_dt(void);
|
||||||
extern void r8a7779_map_io(void);
|
extern void r8a7779_map_io(void);
|
||||||
|
@ -2,6 +2,7 @@
|
|||||||
#define __ASM_R8A7790_H__
|
#define __ASM_R8A7790_H__
|
||||||
|
|
||||||
void r8a7790_add_standard_devices(void);
|
void r8a7790_add_standard_devices(void);
|
||||||
|
void r8a7790_add_dt_devices(void);
|
||||||
void r8a7790_clock_init(void);
|
void r8a7790_clock_init(void);
|
||||||
void r8a7790_pinmux_init(void);
|
void r8a7790_pinmux_init(void);
|
||||||
void r8a7790_init_delay(void);
|
void r8a7790_init_delay(void);
|
||||||
|
@ -1,8 +1,6 @@
|
|||||||
#ifndef __ASM_SH73A0_H__
|
#ifndef __ASM_SH73A0_H__
|
||||||
#define __ASM_SH73A0_H__
|
#define __ASM_SH73A0_H__
|
||||||
|
|
||||||
#define GPIO_NR 310
|
|
||||||
|
|
||||||
/* DMA slave IDs */
|
/* DMA slave IDs */
|
||||||
enum {
|
enum {
|
||||||
SHDMA_SLAVE_INVALID,
|
SHDMA_SLAVE_INVALID,
|
||||||
|
@ -1,68 +0,0 @@
|
|||||||
/*
|
|
||||||
* R8A7740 processor support
|
|
||||||
*
|
|
||||||
* Copyright (C) 2011 Renesas Solutions Corp.
|
|
||||||
* Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; version 2 of the License.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/io.h>
|
|
||||||
#include <linux/irqchip.h>
|
|
||||||
#include <linux/irqchip/arm-gic.h>
|
|
||||||
|
|
||||||
static void __init r8a7740_init_irq_common(void)
|
|
||||||
{
|
|
||||||
void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
|
|
||||||
void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
|
|
||||||
void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
|
|
||||||
|
|
||||||
/* route signals to GIC */
|
|
||||||
iowrite32(0x0, pfc_inta_ctrl);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* To mask the shared interrupt to SPI 149 we must ensure to set
|
|
||||||
* PRIO *and* MASK. Else we run into IRQ floods when registering
|
|
||||||
* the intc_irqpin devices
|
|
||||||
*/
|
|
||||||
iowrite32(0x0, intc_prio_base + 0x0);
|
|
||||||
iowrite32(0x0, intc_prio_base + 0x4);
|
|
||||||
iowrite32(0x0, intc_prio_base + 0x8);
|
|
||||||
iowrite32(0x0, intc_prio_base + 0xc);
|
|
||||||
iowrite8(0xff, intc_msk_base + 0x0);
|
|
||||||
iowrite8(0xff, intc_msk_base + 0x4);
|
|
||||||
iowrite8(0xff, intc_msk_base + 0x8);
|
|
||||||
iowrite8(0xff, intc_msk_base + 0xc);
|
|
||||||
|
|
||||||
iounmap(intc_prio_base);
|
|
||||||
iounmap(intc_msk_base);
|
|
||||||
iounmap(pfc_inta_ctrl);
|
|
||||||
}
|
|
||||||
|
|
||||||
void __init r8a7740_init_irq_of(void)
|
|
||||||
{
|
|
||||||
irqchip_init();
|
|
||||||
r8a7740_init_irq_common();
|
|
||||||
}
|
|
||||||
|
|
||||||
void __init r8a7740_init_irq(void)
|
|
||||||
{
|
|
||||||
void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);
|
|
||||||
void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);
|
|
||||||
|
|
||||||
/* initialize the Generic Interrupt Controller PL390 r0p0 */
|
|
||||||
gic_init(0, 29, gic_dist_base, gic_cpu_base);
|
|
||||||
r8a7740_init_irq_common();
|
|
||||||
}
|
|
@ -1,130 +0,0 @@
|
|||||||
/*
|
|
||||||
* r8a7779 processor support - INTC hardware block
|
|
||||||
*
|
|
||||||
* Copyright (C) 2011 Renesas Solutions Corp.
|
|
||||||
* Copyright (C) 2011 Magnus Damm
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; version 2 of the License.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
||||||
*/
|
|
||||||
#include <linux/kernel.h>
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/platform_device.h>
|
|
||||||
#include <linux/interrupt.h>
|
|
||||||
#include <linux/irq.h>
|
|
||||||
#include <linux/io.h>
|
|
||||||
#include <linux/irqchip/arm-gic.h>
|
|
||||||
#include <linux/platform_data/irq-renesas-intc-irqpin.h>
|
|
||||||
#include <linux/irqchip.h>
|
|
||||||
#include <mach/common.h>
|
|
||||||
#include <mach/irqs.h>
|
|
||||||
#include <mach/r8a7779.h>
|
|
||||||
#include <asm/mach-types.h>
|
|
||||||
#include <asm/mach/arch.h>
|
|
||||||
|
|
||||||
#define INT2SMSKCR0 IOMEM(0xfe7822a0)
|
|
||||||
#define INT2SMSKCR1 IOMEM(0xfe7822a4)
|
|
||||||
#define INT2SMSKCR2 IOMEM(0xfe7822a8)
|
|
||||||
#define INT2SMSKCR3 IOMEM(0xfe7822ac)
|
|
||||||
#define INT2SMSKCR4 IOMEM(0xfe7822b0)
|
|
||||||
|
|
||||||
#define INT2NTSR0 IOMEM(0xfe700060)
|
|
||||||
#define INT2NTSR1 IOMEM(0xfe700064)
|
|
||||||
|
|
||||||
static struct renesas_intc_irqpin_config irqpin0_platform_data = {
|
|
||||||
.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
|
|
||||||
.sense_bitfield_width = 2,
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct resource irqpin0_resources[] = {
|
|
||||||
DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */
|
|
||||||
DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */
|
|
||||||
DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */
|
|
||||||
DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */
|
|
||||||
DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */
|
|
||||||
DEFINE_RES_IRQ(gic_spi(27)), /* IRQ0 */
|
|
||||||
DEFINE_RES_IRQ(gic_spi(28)), /* IRQ1 */
|
|
||||||
DEFINE_RES_IRQ(gic_spi(29)), /* IRQ2 */
|
|
||||||
DEFINE_RES_IRQ(gic_spi(30)), /* IRQ3 */
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_device irqpin0_device = {
|
|
||||||
.name = "renesas_intc_irqpin",
|
|
||||||
.id = 0,
|
|
||||||
.resource = irqpin0_resources,
|
|
||||||
.num_resources = ARRAY_SIZE(irqpin0_resources),
|
|
||||||
.dev = {
|
|
||||||
.platform_data = &irqpin0_platform_data,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
void __init r8a7779_init_irq_extpin(int irlm)
|
|
||||||
{
|
|
||||||
void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE);
|
|
||||||
unsigned long tmp;
|
|
||||||
|
|
||||||
if (icr0) {
|
|
||||||
tmp = ioread32(icr0);
|
|
||||||
if (irlm)
|
|
||||||
tmp |= 1 << 23; /* IRQ0 -> IRQ3 as individual pins */
|
|
||||||
else
|
|
||||||
tmp &= ~(1 << 23); /* IRL mode - not supported */
|
|
||||||
tmp |= (1 << 21); /* LVLMODE = 1 */
|
|
||||||
iowrite32(tmp, icr0);
|
|
||||||
iounmap(icr0);
|
|
||||||
|
|
||||||
if (irlm)
|
|
||||||
platform_device_register(&irqpin0_device);
|
|
||||||
} else
|
|
||||||
pr_warn("r8a7779: unable to setup external irq pin mode\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
|
|
||||||
{
|
|
||||||
return 0; /* always allow wakeup */
|
|
||||||
}
|
|
||||||
|
|
||||||
static void __init r8a7779_init_irq_common(void)
|
|
||||||
{
|
|
||||||
gic_arch_extn.irq_set_wake = r8a7779_set_wake;
|
|
||||||
|
|
||||||
/* route all interrupts to ARM */
|
|
||||||
__raw_writel(0xffffffff, INT2NTSR0);
|
|
||||||
__raw_writel(0x3fffffff, INT2NTSR1);
|
|
||||||
|
|
||||||
/* unmask all known interrupts in INTCS2 */
|
|
||||||
__raw_writel(0xfffffff0, INT2SMSKCR0);
|
|
||||||
__raw_writel(0xfff7ffff, INT2SMSKCR1);
|
|
||||||
__raw_writel(0xfffbffdf, INT2SMSKCR2);
|
|
||||||
__raw_writel(0xbffffffc, INT2SMSKCR3);
|
|
||||||
__raw_writel(0x003fee3f, INT2SMSKCR4);
|
|
||||||
}
|
|
||||||
|
|
||||||
void __init r8a7779_init_irq(void)
|
|
||||||
{
|
|
||||||
void __iomem *gic_dist_base = IOMEM(0xf0001000);
|
|
||||||
void __iomem *gic_cpu_base = IOMEM(0xf0000100);
|
|
||||||
|
|
||||||
/* use GIC to handle interrupts */
|
|
||||||
gic_init(0, 29, gic_dist_base, gic_cpu_base);
|
|
||||||
|
|
||||||
r8a7779_init_irq_common();
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef CONFIG_OF
|
|
||||||
void __init r8a7779_init_irq_dt(void)
|
|
||||||
{
|
|
||||||
irqchip_init();
|
|
||||||
r8a7779_init_irq_common();
|
|
||||||
}
|
|
||||||
#endif
|
|
@ -188,7 +188,7 @@ static struct resource cmt10_resources[] = {
|
|||||||
&cmt##idx##_platform_data, \
|
&cmt##idx##_platform_data, \
|
||||||
sizeof(struct sh_timer_config))
|
sizeof(struct sh_timer_config))
|
||||||
|
|
||||||
void __init r8a73a4_add_standard_devices(void)
|
void __init r8a73a4_add_dt_devices(void)
|
||||||
{
|
{
|
||||||
r8a73a4_register_scif(SCIFA0);
|
r8a73a4_register_scif(SCIFA0);
|
||||||
r8a73a4_register_scif(SCIFA1);
|
r8a73a4_register_scif(SCIFA1);
|
||||||
@ -196,10 +196,15 @@ void __init r8a73a4_add_standard_devices(void)
|
|||||||
r8a73a4_register_scif(SCIFB1);
|
r8a73a4_register_scif(SCIFB1);
|
||||||
r8a73a4_register_scif(SCIFB2);
|
r8a73a4_register_scif(SCIFB2);
|
||||||
r8a73a4_register_scif(SCIFB3);
|
r8a73a4_register_scif(SCIFB3);
|
||||||
|
r8a7790_register_cmt(10);
|
||||||
|
}
|
||||||
|
|
||||||
|
void __init r8a73a4_add_standard_devices(void)
|
||||||
|
{
|
||||||
|
r8a73a4_add_dt_devices();
|
||||||
r8a73a4_register_irqc(0);
|
r8a73a4_register_irqc(0);
|
||||||
r8a73a4_register_irqc(1);
|
r8a73a4_register_irqc(1);
|
||||||
r8a73a4_register_thermal();
|
r8a73a4_register_thermal();
|
||||||
r8a7790_register_cmt(10);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init r8a73a4_init_delay(void)
|
void __init r8a73a4_init_delay(void)
|
||||||
@ -218,7 +223,6 @@ static const char *r8a73a4_boards_compat_dt[] __initdata = {
|
|||||||
|
|
||||||
DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
|
DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
|
||||||
.init_early = r8a73a4_init_delay,
|
.init_early = r8a73a4_init_delay,
|
||||||
.init_time = shmobile_timer_init,
|
|
||||||
.dt_compat = r8a73a4_boards_compat_dt,
|
.dt_compat = r8a73a4_boards_compat_dt,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
#endif /* CONFIG_USE_OF */
|
#endif /* CONFIG_USE_OF */
|
||||||
|
@ -22,6 +22,8 @@
|
|||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
|
#include <linux/irqchip.h>
|
||||||
|
#include <linux/irqchip/arm-gic.h>
|
||||||
#include <linux/platform_data/irq-renesas-intc-irqpin.h>
|
#include <linux/platform_data/irq-renesas-intc-irqpin.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/of_platform.h>
|
#include <linux/of_platform.h>
|
||||||
@ -1019,6 +1021,36 @@ void __init r8a7740_init_delay(void)
|
|||||||
shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
|
shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
void __init r8a7740_init_irq_of(void)
|
||||||
|
{
|
||||||
|
void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
|
||||||
|
void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
|
||||||
|
void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
|
||||||
|
|
||||||
|
irqchip_init();
|
||||||
|
|
||||||
|
/* route signals to GIC */
|
||||||
|
iowrite32(0x0, pfc_inta_ctrl);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* To mask the shared interrupt to SPI 149 we must ensure to set
|
||||||
|
* PRIO *and* MASK. Else we run into IRQ floods when registering
|
||||||
|
* the intc_irqpin devices
|
||||||
|
*/
|
||||||
|
iowrite32(0x0, intc_prio_base + 0x0);
|
||||||
|
iowrite32(0x0, intc_prio_base + 0x4);
|
||||||
|
iowrite32(0x0, intc_prio_base + 0x8);
|
||||||
|
iowrite32(0x0, intc_prio_base + 0xc);
|
||||||
|
iowrite8(0xff, intc_msk_base + 0x0);
|
||||||
|
iowrite8(0xff, intc_msk_base + 0x4);
|
||||||
|
iowrite8(0xff, intc_msk_base + 0x8);
|
||||||
|
iowrite8(0xff, intc_msk_base + 0xc);
|
||||||
|
|
||||||
|
iounmap(intc_prio_base);
|
||||||
|
iounmap(intc_msk_base);
|
||||||
|
iounmap(pfc_inta_ctrl);
|
||||||
|
}
|
||||||
|
|
||||||
static void __init r8a7740_generic_init(void)
|
static void __init r8a7740_generic_init(void)
|
||||||
{
|
{
|
||||||
r8a7740_clock_init(0);
|
r8a7740_clock_init(0);
|
||||||
@ -1035,7 +1067,6 @@ DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
|
|||||||
.init_early = r8a7740_init_delay,
|
.init_early = r8a7740_init_delay,
|
||||||
.init_irq = r8a7740_init_irq_of,
|
.init_irq = r8a7740_init_irq_of,
|
||||||
.init_machine = r8a7740_generic_init,
|
.init_machine = r8a7740_generic_init,
|
||||||
.init_time = shmobile_timer_init,
|
|
||||||
.dt_compat = r8a7740_boards_compat_dt,
|
.dt_compat = r8a7740_boards_compat_dt,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|
||||||
|
@ -95,20 +95,6 @@ static struct sh_timer_config sh_tmu1_platform_data __initdata = {
|
|||||||
&sh_tmu##idx##_platform_data, \
|
&sh_tmu##idx##_platform_data, \
|
||||||
sizeof(sh_tmu##idx##_platform_data))
|
sizeof(sh_tmu##idx##_platform_data))
|
||||||
|
|
||||||
/* USB PHY */
|
|
||||||
static struct resource usb_phy_resources[] __initdata = {
|
|
||||||
DEFINE_RES_MEM(0xffe70800, 0x100),
|
|
||||||
DEFINE_RES_MEM(0xffe76000, 0x100),
|
|
||||||
};
|
|
||||||
|
|
||||||
void __init r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata)
|
|
||||||
{
|
|
||||||
platform_device_register_resndata(&platform_bus, "rcar_usb_phy", -1,
|
|
||||||
usb_phy_resources,
|
|
||||||
ARRAY_SIZE(usb_phy_resources),
|
|
||||||
pdata, sizeof(*pdata));
|
|
||||||
}
|
|
||||||
|
|
||||||
/* USB */
|
/* USB */
|
||||||
static struct usb_phy *phy;
|
static struct usb_phy *phy;
|
||||||
|
|
||||||
@ -248,30 +234,6 @@ void __init r8a7778_pinmux_init(void)
|
|||||||
r8a7778_register_gpio(4);
|
r8a7778_register_gpio(4);
|
||||||
};
|
};
|
||||||
|
|
||||||
/* SDHI */
|
|
||||||
static struct resource sdhi_resources[] __initdata = {
|
|
||||||
/* SDHI0 */
|
|
||||||
DEFINE_RES_MEM(0xFFE4C000, 0x100),
|
|
||||||
DEFINE_RES_IRQ(gic_iid(0x77)),
|
|
||||||
/* SDHI1 */
|
|
||||||
DEFINE_RES_MEM(0xFFE4D000, 0x100),
|
|
||||||
DEFINE_RES_IRQ(gic_iid(0x78)),
|
|
||||||
/* SDHI2 */
|
|
||||||
DEFINE_RES_MEM(0xFFE4F000, 0x100),
|
|
||||||
DEFINE_RES_IRQ(gic_iid(0x76)),
|
|
||||||
};
|
|
||||||
|
|
||||||
void __init r8a7778_sdhi_init(int id,
|
|
||||||
struct sh_mobile_sdhi_info *info)
|
|
||||||
{
|
|
||||||
BUG_ON(id < 0 || id > 2);
|
|
||||||
|
|
||||||
platform_device_register_resndata(
|
|
||||||
&platform_bus, "sh_mobile_sdhi", id,
|
|
||||||
sdhi_resources + (2 * id), 2,
|
|
||||||
info, sizeof(*info));
|
|
||||||
}
|
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
static struct resource i2c_resources[] __initdata = {
|
static struct resource i2c_resources[] __initdata = {
|
||||||
/* I2C0 */
|
/* I2C0 */
|
||||||
@ -288,7 +250,7 @@ static struct resource i2c_resources[] __initdata = {
|
|||||||
DEFINE_RES_IRQ(gic_iid(0x6d)),
|
DEFINE_RES_IRQ(gic_iid(0x6d)),
|
||||||
};
|
};
|
||||||
|
|
||||||
void __init r8a7778_add_i2c_device(int id)
|
static void __init r8a7778_register_i2c(int id)
|
||||||
{
|
{
|
||||||
BUG_ON(id < 0 || id > 3);
|
BUG_ON(id < 0 || id > 3);
|
||||||
|
|
||||||
@ -310,7 +272,7 @@ static struct resource hspi_resources[] __initdata = {
|
|||||||
DEFINE_RES_IRQ(gic_iid(0x75)),
|
DEFINE_RES_IRQ(gic_iid(0x75)),
|
||||||
};
|
};
|
||||||
|
|
||||||
void __init r8a7778_add_hspi_device(int id)
|
void __init r8a7778_register_hspi(int id)
|
||||||
{
|
{
|
||||||
BUG_ON(id < 0 || id > 2);
|
BUG_ON(id < 0 || id > 2);
|
||||||
|
|
||||||
@ -319,21 +281,7 @@ void __init r8a7778_add_hspi_device(int id)
|
|||||||
hspi_resources + (2 * id), 2);
|
hspi_resources + (2 * id), 2);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* MMC */
|
void __init r8a7778_add_dt_devices(void)
|
||||||
static struct resource mmc_resources[] __initdata = {
|
|
||||||
DEFINE_RES_MEM(0xffe4e000, 0x100),
|
|
||||||
DEFINE_RES_IRQ(gic_iid(0x5d)),
|
|
||||||
};
|
|
||||||
|
|
||||||
void __init r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info)
|
|
||||||
{
|
|
||||||
platform_device_register_resndata(
|
|
||||||
&platform_bus, "sh_mmcif", -1,
|
|
||||||
mmc_resources, ARRAY_SIZE(mmc_resources),
|
|
||||||
info, sizeof(*info));
|
|
||||||
}
|
|
||||||
|
|
||||||
void __init r8a7778_add_standard_devices(void)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
@ -357,6 +305,18 @@ void __init r8a7778_add_standard_devices(void)
|
|||||||
r8a7778_register_tmu(1);
|
r8a7778_register_tmu(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void __init r8a7778_add_standard_devices(void)
|
||||||
|
{
|
||||||
|
r8a7778_add_dt_devices();
|
||||||
|
r8a7778_register_i2c(0);
|
||||||
|
r8a7778_register_i2c(1);
|
||||||
|
r8a7778_register_i2c(2);
|
||||||
|
r8a7778_register_i2c(3);
|
||||||
|
r8a7778_register_hspi(0);
|
||||||
|
r8a7778_register_hspi(1);
|
||||||
|
r8a7778_register_hspi(2);
|
||||||
|
}
|
||||||
|
|
||||||
void __init r8a7778_init_late(void)
|
void __init r8a7778_init_late(void)
|
||||||
{
|
{
|
||||||
phy = usb_get_phy(USB_PHY_TYPE_USB2);
|
phy = usb_get_phy(USB_PHY_TYPE_USB2);
|
||||||
@ -446,7 +406,6 @@ static const char *r8a7778_compat_dt[] __initdata = {
|
|||||||
DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
|
DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
|
||||||
.init_early = r8a7778_init_delay,
|
.init_early = r8a7778_init_delay,
|
||||||
.init_irq = r8a7778_init_irq_dt,
|
.init_irq = r8a7778_init_irq_dt,
|
||||||
.init_time = shmobile_timer_init,
|
|
||||||
.dt_compat = r8a7778_compat_dt,
|
.dt_compat = r8a7778_compat_dt,
|
||||||
.init_late = r8a7778_init_late,
|
.init_late = r8a7778_init_late,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
@ -22,8 +22,11 @@
|
|||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
|
#include <linux/irqchip.h>
|
||||||
|
#include <linux/irqchip/arm-gic.h>
|
||||||
#include <linux/of_platform.h>
|
#include <linux/of_platform.h>
|
||||||
#include <linux/platform_data/gpio-rcar.h>
|
#include <linux/platform_data/gpio-rcar.h>
|
||||||
|
#include <linux/platform_data/irq-renesas-intc-irqpin.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <linux/input.h>
|
#include <linux/input.h>
|
||||||
@ -67,6 +70,60 @@ void __init r8a7779_map_io(void)
|
|||||||
iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
|
iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* IRQ */
|
||||||
|
#define INT2SMSKCR0 IOMEM(0xfe7822a0)
|
||||||
|
#define INT2SMSKCR1 IOMEM(0xfe7822a4)
|
||||||
|
#define INT2SMSKCR2 IOMEM(0xfe7822a8)
|
||||||
|
#define INT2SMSKCR3 IOMEM(0xfe7822ac)
|
||||||
|
#define INT2SMSKCR4 IOMEM(0xfe7822b0)
|
||||||
|
|
||||||
|
#define INT2NTSR0 IOMEM(0xfe700060)
|
||||||
|
#define INT2NTSR1 IOMEM(0xfe700064)
|
||||||
|
|
||||||
|
static struct renesas_intc_irqpin_config irqpin0_platform_data __initdata = {
|
||||||
|
.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
|
||||||
|
.sense_bitfield_width = 2,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct resource irqpin0_resources[] __initdata = {
|
||||||
|
DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */
|
||||||
|
DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */
|
||||||
|
DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */
|
||||||
|
DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */
|
||||||
|
DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */
|
||||||
|
DEFINE_RES_IRQ(gic_spi(27)), /* IRQ0 */
|
||||||
|
DEFINE_RES_IRQ(gic_spi(28)), /* IRQ1 */
|
||||||
|
DEFINE_RES_IRQ(gic_spi(29)), /* IRQ2 */
|
||||||
|
DEFINE_RES_IRQ(gic_spi(30)), /* IRQ3 */
|
||||||
|
};
|
||||||
|
|
||||||
|
void __init r8a7779_init_irq_extpin(int irlm)
|
||||||
|
{
|
||||||
|
void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE);
|
||||||
|
u32 tmp;
|
||||||
|
|
||||||
|
if (!icr0) {
|
||||||
|
pr_warn("r8a7779: unable to setup external irq pin mode\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
tmp = ioread32(icr0);
|
||||||
|
if (irlm)
|
||||||
|
tmp |= 1 << 23; /* IRQ0 -> IRQ3 as individual pins */
|
||||||
|
else
|
||||||
|
tmp &= ~(1 << 23); /* IRL mode - not supported */
|
||||||
|
tmp |= (1 << 21); /* LVLMODE = 1 */
|
||||||
|
iowrite32(tmp, icr0);
|
||||||
|
iounmap(icr0);
|
||||||
|
|
||||||
|
if (irlm)
|
||||||
|
platform_device_register_resndata(
|
||||||
|
&platform_bus, "renesas_intc_irqpin", -1,
|
||||||
|
irqpin0_resources, ARRAY_SIZE(irqpin0_resources),
|
||||||
|
&irqpin0_platform_data, sizeof(irqpin0_platform_data));
|
||||||
|
}
|
||||||
|
|
||||||
|
/* PFC/GPIO */
|
||||||
static struct resource r8a7779_pfc_resources[] = {
|
static struct resource r8a7779_pfc_resources[] = {
|
||||||
DEFINE_RES_MEM(0xfffc0000, 0x023c),
|
DEFINE_RES_MEM(0xfffc0000, 0x023c),
|
||||||
};
|
};
|
||||||
@ -537,7 +594,7 @@ static struct platform_device ohci1_device = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
/* Ether */
|
/* Ether */
|
||||||
static struct resource ether_resources[] = {
|
static struct resource ether_resources[] __initdata = {
|
||||||
{
|
{
|
||||||
.start = 0xfde00000,
|
.start = 0xfde00000,
|
||||||
.end = 0xfde003ff,
|
.end = 0xfde003ff,
|
||||||
@ -641,6 +698,29 @@ void __init r8a7779_init_late(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_USE_OF
|
#ifdef CONFIG_USE_OF
|
||||||
|
static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
|
||||||
|
{
|
||||||
|
return 0; /* always allow wakeup */
|
||||||
|
}
|
||||||
|
|
||||||
|
void __init r8a7779_init_irq_dt(void)
|
||||||
|
{
|
||||||
|
gic_arch_extn.irq_set_wake = r8a7779_set_wake;
|
||||||
|
|
||||||
|
irqchip_init();
|
||||||
|
|
||||||
|
/* route all interrupts to ARM */
|
||||||
|
__raw_writel(0xffffffff, INT2NTSR0);
|
||||||
|
__raw_writel(0x3fffffff, INT2NTSR1);
|
||||||
|
|
||||||
|
/* unmask all known interrupts in INTCS2 */
|
||||||
|
__raw_writel(0xfffffff0, INT2SMSKCR0);
|
||||||
|
__raw_writel(0xfff7ffff, INT2SMSKCR1);
|
||||||
|
__raw_writel(0xfffbffdf, INT2SMSKCR2);
|
||||||
|
__raw_writel(0xbffffffc, INT2SMSKCR3);
|
||||||
|
__raw_writel(0x003fee3f, INT2SMSKCR4);
|
||||||
|
}
|
||||||
|
|
||||||
void __init r8a7779_init_delay(void)
|
void __init r8a7779_init_delay(void)
|
||||||
{
|
{
|
||||||
shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
|
shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
|
||||||
@ -667,7 +747,6 @@ DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
|
|||||||
.nr_irqs = NR_IRQS_LEGACY,
|
.nr_irqs = NR_IRQS_LEGACY,
|
||||||
.init_irq = r8a7779_init_irq_dt,
|
.init_irq = r8a7779_init_irq_dt,
|
||||||
.init_machine = r8a7779_add_standard_devices_dt,
|
.init_machine = r8a7779_add_standard_devices_dt,
|
||||||
.init_time = shmobile_timer_init,
|
|
||||||
.init_late = r8a7779_init_late,
|
.init_late = r8a7779_init_late,
|
||||||
.dt_compat = r8a7779_compat_dt,
|
.dt_compat = r8a7779_compat_dt,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
@ -18,6 +18,7 @@
|
|||||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
#include <linux/clocksource.h>
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/of_platform.h>
|
#include <linux/of_platform.h>
|
||||||
@ -160,13 +161,13 @@ static struct resource thermal_resources[] __initdata = {
|
|||||||
thermal_resources, \
|
thermal_resources, \
|
||||||
ARRAY_SIZE(thermal_resources))
|
ARRAY_SIZE(thermal_resources))
|
||||||
|
|
||||||
static struct sh_timer_config cmt00_platform_data = {
|
static struct sh_timer_config cmt00_platform_data __initdata = {
|
||||||
.name = "CMT00",
|
.name = "CMT00",
|
||||||
.timer_bit = 0,
|
.timer_bit = 0,
|
||||||
.clockevent_rating = 80,
|
.clockevent_rating = 80,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct resource cmt00_resources[] = {
|
static struct resource cmt00_resources[] __initdata = {
|
||||||
DEFINE_RES_MEM(0xffca0510, 0x0c),
|
DEFINE_RES_MEM(0xffca0510, 0x0c),
|
||||||
DEFINE_RES_MEM(0xffca0500, 0x04),
|
DEFINE_RES_MEM(0xffca0500, 0x04),
|
||||||
DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
|
DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
|
||||||
@ -179,7 +180,7 @@ static struct resource cmt00_resources[] = {
|
|||||||
&cmt##idx##_platform_data, \
|
&cmt##idx##_platform_data, \
|
||||||
sizeof(struct sh_timer_config))
|
sizeof(struct sh_timer_config))
|
||||||
|
|
||||||
void __init r8a7790_add_standard_devices(void)
|
void __init r8a7790_add_dt_devices(void)
|
||||||
{
|
{
|
||||||
r8a7790_register_scif(SCIFA0);
|
r8a7790_register_scif(SCIFA0);
|
||||||
r8a7790_register_scif(SCIFA1);
|
r8a7790_register_scif(SCIFA1);
|
||||||
@ -191,9 +192,14 @@ void __init r8a7790_add_standard_devices(void)
|
|||||||
r8a7790_register_scif(SCIF1);
|
r8a7790_register_scif(SCIF1);
|
||||||
r8a7790_register_scif(HSCIF0);
|
r8a7790_register_scif(HSCIF0);
|
||||||
r8a7790_register_scif(HSCIF1);
|
r8a7790_register_scif(HSCIF1);
|
||||||
|
r8a7790_register_cmt(00);
|
||||||
|
}
|
||||||
|
|
||||||
|
void __init r8a7790_add_standard_devices(void)
|
||||||
|
{
|
||||||
|
r8a7790_add_dt_devices();
|
||||||
r8a7790_register_irqc(0);
|
r8a7790_register_irqc(0);
|
||||||
r8a7790_register_thermal();
|
r8a7790_register_thermal();
|
||||||
r8a7790_register_cmt(00);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#define MODEMR 0xe6160060
|
#define MODEMR 0xe6160060
|
||||||
@ -258,7 +264,7 @@ void __init r8a7790_timer_init(void)
|
|||||||
iounmap(base);
|
iounmap(base);
|
||||||
#endif /* CONFIG_ARM_ARCH_TIMER */
|
#endif /* CONFIG_ARM_ARCH_TIMER */
|
||||||
|
|
||||||
shmobile_timer_init();
|
clocksource_of_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init r8a7790_init_delay(void)
|
void __init r8a7790_init_delay(void)
|
||||||
|
@ -99,6 +99,9 @@ static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
|||||||
|
|
||||||
static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
|
static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
|
||||||
{
|
{
|
||||||
|
|
||||||
|
/* setup r8a7779 specific SCU base */
|
||||||
|
shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
|
||||||
scu_enable(shmobile_scu_base);
|
scu_enable(shmobile_scu_base);
|
||||||
|
|
||||||
/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
|
/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
|
||||||
@ -117,14 +120,6 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
|
|||||||
r8a7779_platform_cpu_kill(3);
|
r8a7779_platform_cpu_kill(3);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __init r8a7779_smp_init_cpus(void)
|
|
||||||
{
|
|
||||||
/* setup r8a7779 specific SCU base */
|
|
||||||
shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
|
|
||||||
|
|
||||||
shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base));
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef CONFIG_HOTPLUG_CPU
|
#ifdef CONFIG_HOTPLUG_CPU
|
||||||
static int r8a7779_scu_psr_core_disabled(int cpu)
|
static int r8a7779_scu_psr_core_disabled(int cpu)
|
||||||
{
|
{
|
||||||
@ -175,7 +170,6 @@ static int r8a7779_cpu_disable(unsigned int cpu)
|
|||||||
#endif /* CONFIG_HOTPLUG_CPU */
|
#endif /* CONFIG_HOTPLUG_CPU */
|
||||||
|
|
||||||
struct smp_operations r8a7779_smp_ops __initdata = {
|
struct smp_operations r8a7779_smp_ops __initdata = {
|
||||||
.smp_init_cpus = r8a7779_smp_init_cpus,
|
|
||||||
.smp_prepare_cpus = r8a7779_smp_prepare_cpus,
|
.smp_prepare_cpus = r8a7779_smp_prepare_cpus,
|
||||||
.smp_boot_secondary = r8a7779_boot_secondary,
|
.smp_boot_secondary = r8a7779_boot_secondary,
|
||||||
#ifdef CONFIG_HOTPLUG_CPU
|
#ifdef CONFIG_HOTPLUG_CPU
|
||||||
|
@ -62,6 +62,8 @@ static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
|||||||
|
|
||||||
static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
|
static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
|
||||||
{
|
{
|
||||||
|
/* setup sh73a0 specific SCU base */
|
||||||
|
shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
|
||||||
scu_enable(shmobile_scu_base);
|
scu_enable(shmobile_scu_base);
|
||||||
|
|
||||||
/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
|
/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
|
||||||
@ -74,14 +76,6 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
|
|||||||
scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
|
scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __init sh73a0_smp_init_cpus(void)
|
|
||||||
{
|
|
||||||
/* setup sh73a0 specific SCU base */
|
|
||||||
shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
|
|
||||||
|
|
||||||
shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base));
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef CONFIG_HOTPLUG_CPU
|
#ifdef CONFIG_HOTPLUG_CPU
|
||||||
static int sh73a0_cpu_kill(unsigned int cpu)
|
static int sh73a0_cpu_kill(unsigned int cpu)
|
||||||
{
|
{
|
||||||
@ -120,7 +114,6 @@ static int sh73a0_cpu_disable(unsigned int cpu)
|
|||||||
#endif /* CONFIG_HOTPLUG_CPU */
|
#endif /* CONFIG_HOTPLUG_CPU */
|
||||||
|
|
||||||
struct smp_operations sh73a0_smp_ops __initdata = {
|
struct smp_operations sh73a0_smp_ops __initdata = {
|
||||||
.smp_init_cpus = sh73a0_smp_init_cpus,
|
|
||||||
.smp_prepare_cpus = sh73a0_smp_prepare_cpus,
|
.smp_prepare_cpus = sh73a0_smp_prepare_cpus,
|
||||||
.smp_boot_secondary = sh73a0_boot_secondary,
|
.smp_boot_secondary = sh73a0_boot_secondary,
|
||||||
#ifdef CONFIG_HOTPLUG_CPU
|
#ifdef CONFIG_HOTPLUG_CPU
|
||||||
|
@ -59,7 +59,3 @@ void __init shmobile_earlytimer_init(void)
|
|||||||
late_time_init = shmobile_late_time_init;
|
late_time_init = shmobile_late_time_init;
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init shmobile_timer_init(void)
|
|
||||||
{
|
|
||||||
clocksource_of_init();
|
|
||||||
}
|
|
||||||
|
Loading…
Reference in New Issue
Block a user