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ACPI, APEI: Add 64-bit read/write support for APEI on i386
Base ACPI (CA) currently does not support atomic 64-bit reads and writes
(acpi_read() and acpi_write() split 64-bit loads/stores into two
32-bit transfers) yet APEI expects 64-bit transfer capability, even
when running on 32-bit systems.
This patch implements 64-bit read and write routines for APEI usage.
This patch re-factors similar functionality introduced in commit
04c25997c9
, bringing it into the ACPI subsystem in preparation for
removing ./drivers/acpi/atomicio.[ch]. In the implementation I have
replicated acpi_os_read_memory() and acpi_os_write_memory(), creating
64-bit versions for APEI to utilize, as opposed to something more
elegant. My thinking is that we should attempt to see if we can get
ACPI's CA/OSL changed so that the existing acpi_read() and acpi_write()
interfaces are natively 64-bit capable and then subsequently remove the
replication.
Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
Signed-off-by: Len Brown <len.brown@intel.com>
This commit is contained in:
parent
dcd6c92267
commit
e615bf5b55
@ -596,33 +596,19 @@ int apei_read(u64 *val, struct acpi_generic_address *reg)
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{
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int rc;
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u64 address;
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u32 tmp, width = reg->bit_width;
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acpi_status status;
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rc = apei_check_gar(reg, &address);
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if (rc)
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return rc;
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if (width == 64)
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width = 32; /* Break into two 32-bit transfers */
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*val = 0;
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switch(reg->space_id) {
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case ACPI_ADR_SPACE_SYSTEM_MEMORY:
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status = acpi_os_read_memory((acpi_physical_address)
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address, &tmp, width);
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status = acpi_os_read_memory64((acpi_physical_address)
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address, val, reg->bit_width);
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if (ACPI_FAILURE(status))
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return -EIO;
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*val = tmp;
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if (reg->bit_width == 64) {
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/* Read the top 32 bits */
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status = acpi_os_read_memory((acpi_physical_address)
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(address + 4), &tmp, 32);
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if (ACPI_FAILURE(status))
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return -EIO;
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*val |= ((u64)tmp << 32);
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}
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break;
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case ACPI_ADR_SPACE_SYSTEM_IO:
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status = acpi_os_read_port(address, (u32 *)val, reg->bit_width);
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@ -642,31 +628,18 @@ int apei_write(u64 val, struct acpi_generic_address *reg)
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{
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int rc;
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u64 address;
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u32 width = reg->bit_width;
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acpi_status status;
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rc = apei_check_gar(reg, &address);
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if (rc)
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return rc;
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if (width == 64)
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width = 32; /* Break into two 32-bit transfers */
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switch (reg->space_id) {
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case ACPI_ADR_SPACE_SYSTEM_MEMORY:
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status = acpi_os_write_memory((acpi_physical_address)
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address, ACPI_LODWORD(val),
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width);
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status = acpi_os_write_memory64((acpi_physical_address)
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address, val, reg->bit_width);
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if (ACPI_FAILURE(status))
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return -EIO;
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if (reg->bit_width == 64) {
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status = acpi_os_write_memory((acpi_physical_address)
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(address + 4),
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ACPI_HIDWORD(val), 32);
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if (ACPI_FAILURE(status))
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return -EIO;
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}
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break;
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case ACPI_ADR_SPACE_SYSTEM_IO:
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status = acpi_os_write_port(address, val, reg->bit_width);
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@ -710,6 +710,67 @@ acpi_os_read_memory(acpi_physical_address phys_addr, u32 * value, u32 width)
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return AE_OK;
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}
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#ifdef readq
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static inline u64 read64(const volatile void __iomem *addr)
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{
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return readq(addr);
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}
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#else
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static inline u64 read64(const volatile void __iomem *addr)
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{
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u64 l, h;
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l = readl(addr);
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h = readl(addr+4);
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return l | (h << 32);
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}
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#endif
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acpi_status
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acpi_os_read_memory64(acpi_physical_address phys_addr, u64 *value, u32 width)
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{
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void __iomem *virt_addr;
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unsigned int size = width / 8;
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bool unmap = false;
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u64 dummy;
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rcu_read_lock();
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virt_addr = acpi_map_vaddr_lookup(phys_addr, size);
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if (!virt_addr) {
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rcu_read_unlock();
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virt_addr = acpi_os_ioremap(phys_addr, size);
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if (!virt_addr)
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return AE_BAD_ADDRESS;
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unmap = true;
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}
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if (!value)
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value = &dummy;
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switch (width) {
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case 8:
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*(u8 *) value = readb(virt_addr);
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break;
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case 16:
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*(u16 *) value = readw(virt_addr);
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break;
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case 32:
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*(u32 *) value = readl(virt_addr);
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break;
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case 64:
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*(u64 *) value = read64(virt_addr);
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break;
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default:
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BUG();
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}
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if (unmap)
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iounmap(virt_addr);
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else
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rcu_read_unlock();
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return AE_OK;
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}
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acpi_status
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acpi_os_write_memory(acpi_physical_address phys_addr, u32 value, u32 width)
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{
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@ -749,6 +810,61 @@ acpi_os_write_memory(acpi_physical_address phys_addr, u32 value, u32 width)
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return AE_OK;
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}
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#ifdef writeq
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static inline void write64(u64 val, volatile void __iomem *addr)
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{
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writeq(val, addr);
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}
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#else
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static inline void write64(u64 val, volatile void __iomem *addr)
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{
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writel(val, addr);
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writel(val>>32, addr+4);
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}
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#endif
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acpi_status
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acpi_os_write_memory64(acpi_physical_address phys_addr, u64 value, u32 width)
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{
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void __iomem *virt_addr;
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unsigned int size = width / 8;
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bool unmap = false;
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rcu_read_lock();
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virt_addr = acpi_map_vaddr_lookup(phys_addr, size);
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if (!virt_addr) {
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rcu_read_unlock();
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virt_addr = acpi_os_ioremap(phys_addr, size);
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if (!virt_addr)
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return AE_BAD_ADDRESS;
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unmap = true;
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}
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switch (width) {
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case 8:
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writeb(value, virt_addr);
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break;
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case 16:
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writew(value, virt_addr);
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break;
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case 32:
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writel(value, virt_addr);
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break;
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case 64:
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write64(value, virt_addr);
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break;
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default:
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BUG();
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}
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if (unmap)
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iounmap(virt_addr);
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else
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rcu_read_unlock();
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return AE_OK;
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}
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acpi_status
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acpi_os_read_pci_configuration(struct acpi_pci_id * pci_id, u32 reg,
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u64 *value, u32 width)
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@ -218,9 +218,13 @@ acpi_status acpi_os_write_port(acpi_io_address address, u32 value, u32 width);
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*/
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acpi_status
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acpi_os_read_memory(acpi_physical_address address, u32 * value, u32 width);
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acpi_status
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acpi_os_read_memory64(acpi_physical_address address, u64 *value, u32 width);
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acpi_status
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acpi_os_write_memory(acpi_physical_address address, u32 value, u32 width);
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acpi_status
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acpi_os_write_memory64(acpi_physical_address address, u64 value, u32 width);
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/*
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* Platform and hardware-independent PCI configuration space access
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