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ath5k: define ath_common ops
Only common ath read/write ops go through the common ops. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -1315,17 +1315,21 @@ static inline unsigned int ath5k_hw_clocktoh(unsigned int clock, bool turbo)
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return turbo ? (clock / 80) : (clock / 40);
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}
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/*
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* Read from a register
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*/
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static inline struct ath_common *ath5k_hw_common(struct ath5k_hw *ah)
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{
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return &ah->common;
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}
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static inline struct ath_regulatory *ath5k_hw_regulatory(struct ath5k_hw *ah)
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{
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return &(ath5k_hw_common(ah)->regulatory);
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}
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static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
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{
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return ioread32(ah->ah_iobase + reg);
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}
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/*
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* Write to a register
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*/
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static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
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{
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iowrite32(val, ah->ah_iobase + reg);
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@ -437,6 +437,22 @@ ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val)
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return name;
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}
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static unsigned int ath5k_ioread32(void *hw_priv, u32 reg_offset)
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{
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struct ath5k_hw *ah = (struct ath5k_hw *) hw_priv;
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return ath5k_hw_reg_read(ah, reg_offset);
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}
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static void ath5k_iowrite32(void *hw_priv, u32 val, u32 reg_offset)
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{
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struct ath5k_hw *ah = (struct ath5k_hw *) hw_priv;
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ath5k_hw_reg_write(ah, val, reg_offset);
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}
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static const struct ath_ops ath5k_common_ops = {
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.read = ath5k_ioread32,
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.write = ath5k_iowrite32,
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};
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static int __devinit
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ath5k_pci_probe(struct pci_dev *pdev,
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@ -576,6 +592,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
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sc->ah->ah_sc = sc;
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sc->ah->ah_iobase = sc->iobase;
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common = ath5k_hw_common(sc->ah);
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common->ops = &ath5k_common_ops;
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common->cachelsz = csz << 2; /* convert to bytes */
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/* Initialize device */
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@ -201,15 +201,4 @@ struct ath5k_softc {
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#define ath5k_hw_hasveol(_ah) \
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(ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0)
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static inline struct ath_common *ath5k_hw_common(struct ath5k_hw *ah)
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{
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return &ah->common;
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}
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static inline struct ath_regulatory *ath5k_hw_regulatory(struct ath5k_hw *ah)
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{
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return &(ath5k_hw_common(ah)->regulatory);
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}
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#endif
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