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https://github.com/edk2-porting/linux-next.git
synced 2024-12-23 04:34:11 +08:00
[ALSA] oxygen: save register writes
Save the written values of all CMI8788 and AC97 registers and of some of the DAC/ADC registers so that it is possible to restore the register state later. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Jaroslav Kysela <perex@perex.cz>
This commit is contained in:
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c13650079b
commit
e58aee9580
@ -80,6 +80,7 @@ MODULE_DEVICE_TABLE(pci, oxygen_ids);
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struct generic_data {
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u8 ak4396_ctl2;
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u16 saved_wm8785_registers[2];
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};
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static void ak4396_write(struct oxygen *chip, unsigned int codec,
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@ -99,12 +100,16 @@ static void ak4396_write(struct oxygen *chip, unsigned int codec,
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static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
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{
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struct generic_data *data = chip->model_data;
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oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
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OXYGEN_SPI_DATA_LENGTH_2 |
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OXYGEN_SPI_CLOCK_160 |
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(3 << OXYGEN_SPI_CODEC_SHIFT) |
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OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
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(reg << 9) | value);
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if (reg < ARRAY_SIZE(data->saved_wm8785_registers))
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data->saved_wm8785_registers[reg] = value;
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}
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static void ak4396_init(struct oxygen *chip)
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@ -135,10 +140,16 @@ static void ak5385_init(struct oxygen *chip)
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static void wm8785_init(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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data->saved_wm8785_registers[0] = WM8785_MCR_SLAVE |
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WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
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data->saved_wm8785_registers[1] = WM8785_WL_24;
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wm8785_write(chip, WM8785_R7, 0);
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wm8785_write(chip, WM8785_R0, WM8785_MCR_SLAVE |
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WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST);
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wm8785_write(chip, WM8785_R1, WM8785_WL_24);
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wm8785_write(chip, WM8785_R0, data->saved_wm8785_registers[0]);
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wm8785_write(chip, WM8785_R1, data->saved_wm8785_registers[1]);
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snd_component_add(chip->card, "WM8785");
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}
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@ -80,6 +80,12 @@ struct oxygen {
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struct work_struct spdif_input_bits_work;
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struct work_struct gpio_work;
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wait_queue_head_t ac97_waitqueue;
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union {
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u8 _8[OXYGEN_IO_SIZE];
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__le16 _16[OXYGEN_IO_SIZE / 2];
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__le32 _32[OXYGEN_IO_SIZE / 4];
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} saved_registers;
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u16 saved_ac97_registers[2][0x40];
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};
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struct oxygen_model {
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@ -44,18 +44,21 @@ EXPORT_SYMBOL(oxygen_read32);
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void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value)
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{
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outb(value, chip->addr + reg);
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chip->saved_registers._8[reg] = value;
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}
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EXPORT_SYMBOL(oxygen_write8);
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void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value)
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{
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outw(value, chip->addr + reg);
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chip->saved_registers._16[reg / 2] = cpu_to_le16(value);
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}
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EXPORT_SYMBOL(oxygen_write16);
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void oxygen_write32(struct oxygen *chip, unsigned int reg, u32 value)
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{
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outl(value, chip->addr + reg);
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chip->saved_registers._32[reg / 4] = cpu_to_le32(value);
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}
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EXPORT_SYMBOL(oxygen_write32);
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@ -63,7 +66,10 @@ void oxygen_write8_masked(struct oxygen *chip, unsigned int reg,
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u8 value, u8 mask)
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{
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u8 tmp = inb(chip->addr + reg);
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outb((tmp & ~mask) | (value & mask), chip->addr + reg);
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tmp &= ~mask;
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tmp |= value & mask;
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outb(tmp, chip->addr + reg);
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chip->saved_registers._8[reg] = tmp;
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}
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EXPORT_SYMBOL(oxygen_write8_masked);
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@ -71,7 +77,10 @@ void oxygen_write16_masked(struct oxygen *chip, unsigned int reg,
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u16 value, u16 mask)
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{
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u16 tmp = inw(chip->addr + reg);
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outw((tmp & ~mask) | (value & mask), chip->addr + reg);
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tmp &= ~mask;
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tmp |= value & mask;
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outw(tmp, chip->addr + reg);
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chip->saved_registers._16[reg / 2] = cpu_to_le16(tmp);
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}
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EXPORT_SYMBOL(oxygen_write16_masked);
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@ -79,7 +88,10 @@ void oxygen_write32_masked(struct oxygen *chip, unsigned int reg,
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u32 value, u32 mask)
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{
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u32 tmp = inl(chip->addr + reg);
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outl((tmp & ~mask) | (value & mask), chip->addr + reg);
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tmp &= ~mask;
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tmp |= value & mask;
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outl(tmp, chip->addr + reg);
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chip->saved_registers._32[reg / 4] = cpu_to_le32(tmp);
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}
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EXPORT_SYMBOL(oxygen_write32_masked);
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@ -128,8 +140,10 @@ void oxygen_write_ac97(struct oxygen *chip, unsigned int codec,
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oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
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/* require two "completed" writes, just to be sure */
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if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_WRITE_DONE) >= 0 &&
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++succeeded >= 2)
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++succeeded >= 2) {
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chip->saved_ac97_registers[codec][index / 2] = data;
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return;
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}
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}
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snd_printk(KERN_ERR "AC'97 write timeout\n");
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}
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@ -132,6 +132,9 @@ struct xonar_data {
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u8 ext_power_int_reg;
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u8 ext_power_bit;
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u8 has_power;
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u8 pcm1796_oversampling;
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u8 cs4398_fm;
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u8 cs4362a_fm;
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};
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static void pcm1796_write(struct oxygen *chip, unsigned int codec,
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@ -186,12 +189,13 @@ static void xonar_d2_init(struct oxygen *chip)
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data->anti_pop_delay = 300;
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data->output_enable_bit = GPIO_D2_OUTPUT_ENABLE;
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data->pcm1796_oversampling = PCM1796_OS_64;
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for (i = 0; i < 4; ++i) {
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pcm1796_write(chip, i, 18, PCM1796_MUTE | PCM1796_DMF_DISABLED |
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PCM1796_FMT_24_LJUST | PCM1796_ATLD);
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pcm1796_write(chip, i, 19, PCM1796_FLT_SHARP | PCM1796_ATS_1);
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pcm1796_write(chip, i, 20, PCM1796_OS_64);
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pcm1796_write(chip, i, 20, data->pcm1796_oversampling);
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pcm1796_write(chip, i, 21, 0);
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pcm1796_write(chip, i, 16, 0x0f); /* set ATL/ATR after ATLD */
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pcm1796_write(chip, i, 17, 0x0f);
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@ -226,6 +230,9 @@ static void xonar_dx_init(struct oxygen *chip)
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data->ext_power_reg = OXYGEN_GPI_DATA;
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data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
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data->ext_power_bit = GPI_DX_EXT_POWER;
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data->cs4398_fm = CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
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data->cs4362a_fm = CS4362A_FM_SINGLE |
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CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
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oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
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OXYGEN_2WIRE_LENGTH_8 |
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@ -236,8 +243,7 @@ static void xonar_dx_init(struct oxygen *chip)
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cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
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cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
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/* configure */
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cs4398_write(chip, 2, CS4398_FM_SINGLE |
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CS4398_DEM_NONE | CS4398_DIF_LJUST);
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cs4398_write(chip, 2, data->cs4398_fm);
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cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
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cs4398_write(chip, 4, CS4398_MUTEP_LOW | CS4398_PAMUTE);
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cs4398_write(chip, 5, 0xfe);
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@ -249,16 +255,13 @@ static void xonar_dx_init(struct oxygen *chip)
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CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
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cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE);
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cs4362a_write(chip, 0x05, 0);
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cs4362a_write(chip, 0x06, CS4362A_FM_SINGLE |
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CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
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cs4362a_write(chip, 0x06, data->cs4362a_fm);
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cs4362a_write(chip, 0x07, 0x7f | CS4362A_MUTE);
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cs4362a_write(chip, 0x08, 0x7f | CS4362A_MUTE);
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cs4362a_write(chip, 0x09, CS4362A_FM_SINGLE |
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CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
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cs4362a_write(chip, 0x09, data->cs4362a_fm);
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cs4362a_write(chip, 0x0a, 0x7f | CS4362A_MUTE);
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cs4362a_write(chip, 0x0b, 0x7f | CS4362A_MUTE);
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cs4362a_write(chip, 0x0c, CS4362A_FM_SINGLE |
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CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
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cs4362a_write(chip, 0x0c, data->cs4362a_fm);
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cs4362a_write(chip, 0x0d, 0x7f | CS4362A_MUTE);
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cs4362a_write(chip, 0x0e, 0x7f | CS4362A_MUTE);
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/* clear power down */
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@ -294,12 +297,13 @@ static void xonar_dx_cleanup(struct oxygen *chip)
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static void set_pcm1796_params(struct oxygen *chip,
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struct snd_pcm_hw_params *params)
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{
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struct xonar_data *data = chip->model_data;
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unsigned int i;
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u8 value;
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value = params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64;
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data->pcm1796_oversampling =
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params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64;
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for (i = 0; i < 4; ++i)
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pcm1796_write(chip, i, 20, value);
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pcm1796_write(chip, i, 20, data->pcm1796_oversampling);
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}
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static void update_pcm1796_volume(struct oxygen *chip)
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@ -342,24 +346,24 @@ static void set_cs53x1_params(struct oxygen *chip,
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static void set_cs43xx_params(struct oxygen *chip,
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struct snd_pcm_hw_params *params)
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{
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u8 fm_cs4398, fm_cs4362a;
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struct xonar_data *data = chip->model_data;
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fm_cs4398 = CS4398_DEM_NONE | CS4398_DIF_LJUST;
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fm_cs4362a = CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
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data->cs4398_fm = CS4398_DEM_NONE | CS4398_DIF_LJUST;
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data->cs4362a_fm = CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
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if (params_rate(params) <= 50000) {
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fm_cs4398 |= CS4398_FM_SINGLE;
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fm_cs4362a |= CS4362A_FM_SINGLE;
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data->cs4398_fm |= CS4398_FM_SINGLE;
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data->cs4362a_fm |= CS4362A_FM_SINGLE;
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} else if (params_rate(params) <= 100000) {
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fm_cs4398 |= CS4398_FM_DOUBLE;
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fm_cs4362a |= CS4362A_FM_DOUBLE;
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data->cs4398_fm |= CS4398_FM_DOUBLE;
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data->cs4362a_fm |= CS4362A_FM_DOUBLE;
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} else {
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fm_cs4398 |= CS4398_FM_QUAD;
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fm_cs4362a |= CS4362A_FM_QUAD;
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data->cs4398_fm |= CS4398_FM_QUAD;
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data->cs4362a_fm |= CS4362A_FM_QUAD;
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}
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cs4398_write(chip, 2, fm_cs4398);
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cs4362a_write(chip, 0x06, fm_cs4362a);
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cs4362a_write(chip, 0x09, fm_cs4362a);
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cs4362a_write(chip, 0x0c, fm_cs4362a);
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cs4398_write(chip, 2, data->cs4398_fm);
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cs4362a_write(chip, 0x06, data->cs4362a_fm);
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cs4362a_write(chip, 0x09, data->cs4362a_fm);
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cs4362a_write(chip, 0x0c, data->cs4362a_fm);
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}
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static void update_cs4362a_volumes(struct oxygen *chip)
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