2
0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-11-30 13:34:44 +08:00

!fixup: dts: odin2 pwrseq wlan

This commit is contained in:
Xilin Wu 2024-03-30 15:38:06 +08:00
parent d55547a571
commit e44ee2e67a

View File

@ -446,6 +446,68 @@
regulator-always-on;
regulator-boot-on;
};
wcn7850-pmu {
compatible = "qcom,wcn7850-pmu";
pinctrl-names = "default";
pinctrl-0 = <&wlan_en>, <&pmk8550_sleep_clk>;
wlan-enable-gpios = <&tlmm 80 GPIO_ACTIVE_HIGH>;
/*
* TODO Add bt-enable-gpios once the Bluetooth driver is
* converted to using the power sequencer.
*/
vdd-supply = <&vreg_s5g_0p85>;
vddio-supply = <&vreg_l15b_1p8>;
vddaon-supply = <&vreg_s2g_0p85>;
vdddig-supply = <&vreg_s4e_0p95>;
vddrfa1p2-supply = <&vreg_s4g_1p25>;
vddrfa1p8-supply = <&vreg_s6g_1p86>;
regulators {
vreg_pmu_rfa_cmn: ldo0 {
regulator-name = "vreg_pmu_rfa_cmn";
};
vreg_pmu_aon_0p59: ldo1 {
regulator-name = "vreg_pmu_aon_0p59";
};
vreg_pmu_wlcx_0p8: ldo2 {
regulator-name = "vreg_pmu_wlcx_0p8";
};
vreg_pmu_wlmx_0p85: ldo3 {
regulator-name = "vreg_pmu_wlmx_0p85";
};
vreg_pmu_btcmx_0p85: ldo4 {
regulator-name = "vreg_pmu_btcmx_0p85";
};
vreg_pmu_rfa_0p8: ldo5 {
regulator-name = "vreg_pmu_rfa_0p8";
};
vreg_pmu_rfa_1p2: ldo6 {
regulator-name = "vreg_pmu_rfa_1p2";
};
vreg_pmu_rfa_1p8: ldo7 {
regulator-name = "vreg_pmu_rfa_1p8";
};
vreg_pmu_pcie_0p9: ldo8 {
regulator-name = "vreg_pmu_pcie_0p9";
};
vreg_pmu_pcie_1p8: ldo9 {
regulator-name = "vreg_pmu_pcie_1p8";
};
};
};
};
&apps_rsc {
@ -1158,17 +1220,15 @@
compatible = "pci17cb,1107";
reg = <0x10000 0x0 0x0 0x0 0x0>;
pinctrl-names = "default";
pinctrl-0 = <&wlan_en>, <&pmk8550_sleep_clk>;
enable-gpios = <&tlmm 80 GPIO_ACTIVE_HIGH>;
vdd-supply = <&vreg_s5g_0p85>;
vddio-supply = <&vreg_l15b_1p8>;
vddaon-supply = <&vreg_s2g_0p85>;
vdddig-supply = <&vreg_s4e_0p95>;
vddrfa1p2-supply = <&vreg_s4g_1p25>;
vddrfa1p8-supply = <&vreg_s6g_1p86>;
vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
vddaon-supply = <&vreg_pmu_aon_0p59>;
vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
};
};