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clk/exynos5250: change parent to aclk200_disp1 for hdmi subsystem
parent of hdmi and mixer block is mentioned as aclk200 which is not correct. It is clocked by the ouput of aclk200_disp1. Hence parent for mixer and hdmi clocks is changed to aclk200_disp1. Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -489,8 +489,8 @@ static struct samsung_gate_clock exynos5250_gate_clks[] __initdata = {
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GATE(mie1, "mie1", "aclk200", GATE_IP_DISP1, 1, 0, 0),
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GATE(dsim0, "dsim0", "aclk200", GATE_IP_DISP1, 3, 0, 0),
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GATE(dp, "dp", "aclk200", GATE_IP_DISP1, 4, 0, 0),
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GATE(mixer, "mixer", "aclk200", GATE_IP_DISP1, 5, 0, 0),
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GATE(hdmi, "hdmi", "aclk200", GATE_IP_DISP1, 6, 0, 0),
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GATE(mixer, "mixer", "mout_aclk200_disp1", GATE_IP_DISP1, 5, 0, 0),
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GATE(hdmi, "hdmi", "mout_aclk200_disp1", GATE_IP_DISP1, 6, 0, 0),
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GATE(g2d, "g2d", "aclk200", GATE_IP_ACP, 3, 0, 0),
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};
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