mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-23 04:34:11 +08:00
This contains the rk3368-geekbox as new board, mailbox device
nodes for the core rk3368 and some cleanups for gpio-keys, mmc and tsadc. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCAAGBQJXDIe4AAoJEPOmecmc0R2B3acH/3U9VHCGVy7w5RNl/UISe6Eu og7QZyy8r8dNw+bk9EX8x9AyqkN4bHAfAqg+Pc+JvxOeqmTjxFqPqZKWjEUQ8BOw SPsJE0ZeRRYAvp1OYfR1ATGwRQDvJq+DaKtb9d8S6ZdYdwXWR/JhkXiCxpQGEqAO TV82csxc86T+F+GJN63uk0UVfnZhzFtCJ6zSWBVyEpiUYxeQwTSkxjVUUJagOJLT Wb/0qgD2b8L1Xs8Flj0zVwAsvNIBKlxsaXzhN9EBD9pnHDQJ1l2cU2EdsQtWCwlE 9ic2kwYFlgTrCAo1FITWFgyUTFLnuGcrfn2QIBIWK1X6TBJuYauGzslJEE96luw= =zT4u -----END PGP SIGNATURE----- Merge tag 'v4.7-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64 This contains the rk3368-geekbox as new board, mailbox device nodes for the core rk3368 and some cleanups for gpio-keys, mmc and tsadc. * tag 'v4.7-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: Documentation: devicetree: rockchip: Document rk3368-GeekBox arm64: dts: rockchip: Add rk3368 GeekBox dts arm64: dts: rockchip: Clean up gpio-keys nodes dt-bindings: Add vendor prefix for GeekBuying.com arm64: dts: rockchip: Add rk3368 mailbox device nodes arm64: dts: rockchip: remove broken-cd from emmc and sdio arm64: dts: rockchip: fix the incorrect otp-out pin on rk3368 Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
e24f89e37b
@ -39,6 +39,10 @@ Rockchip platforms device tree bindings
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Required root node properties:
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- compatible = "netxeon,r89", "rockchip,rk3288";
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- GeekBuying GeekBox:
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Required root node properties:
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- compatible = "geekbuying,geekbox", "rockchip,rk3368";
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- Google Brain (dev-board):
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Required root node properties:
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- compatible = "google,veyron-brain-rev0", "google,veyron-brain",
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@ -91,6 +91,7 @@ firefly Firefly
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focaltech FocalTech Systems Co.,Ltd
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fsl Freescale Semiconductor
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ge General Electric Company
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geekbuying GeekBuying
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GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc.
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gef GE Fanuc Intelligent Platforms Embedded Systems, Inc.
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geniatech Geniatech, Inc.
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@ -1,4 +1,5 @@
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
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always := $(dtb-y)
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@ -40,6 +40,7 @@
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/pwm/pwm.h>
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#include "rk3368.dtsi"
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@ -105,16 +106,14 @@
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keys: gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwr_key>;
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button@0 {
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power {
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wakeup-source;
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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label = "GPIO Power";
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linux,code = <116>;
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linux,code = <KEY_POWER>;
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};
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};
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@ -152,7 +151,6 @@
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};
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&emmc {
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broken-cd;
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bus-width = <8>;
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cap-mmc-highspeed;
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disable-wp;
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319
arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
Normal file
319
arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
Normal file
@ -0,0 +1,319 @@
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/*
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* Copyright (c) 2016 Andreas Färber
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "rk3368.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "GeekBox";
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compatible = "geekbuying,geekbox", "rockchip,rk3368";
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chosen {
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stdout-path = "serial2:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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ext_gmac: gmac-clk {
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "ext_gmac";
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#clock-cells = <0>;
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};
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ir: ir-receiver {
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compatible = "gpio-ir-receiver";
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gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&ir_int>;
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};
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keys: gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pwr_key>;
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power {
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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label = "GPIO Power";
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linux,code = <KEY_POWER>;
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wakeup-source;
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};
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};
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leds: gpio-leds {
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compatible = "gpio-leds";
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blue {
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gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
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label = "geekbox:blue:led";
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default-state = "on";
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};
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red {
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gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
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label = "geekbox:red:led";
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default-state = "off";
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};
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};
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vcc_sys: vcc-sys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_sys";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&emmc {
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status = "okay";
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bus-width = <8>;
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cap-mmc-highspeed;
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clock-frequency = <150000000>;
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disable-wp;
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keep-power-in-suspend;
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non-removable;
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num-slots = <1>;
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vmmc-supply = <&vcc_io>;
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vqmmc-supply = <&vcc18_flash>;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
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};
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&gmac {
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status = "okay";
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phy-supply = <&vcc_lan>;
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phy-mode = "rgmii";
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clock_in_out = "input";
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assigned-clocks = <&cru SCLK_MAC>;
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assigned-clock-parents = <&ext_gmac>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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tx_delay = <0x30>;
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rx_delay = <0x10>;
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};
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&i2c0 {
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status = "okay";
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rk808: pmic@1b {
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compatible = "rockchip,rk808";
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reg = <0x1b>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int>, <&pmic_sleep>;
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interrupt-parent = <&gpio0>;
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interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
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rockchip,system-power-controller;
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vcc1-supply = <&vcc_sys>;
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vcc2-supply = <&vcc_sys>;
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vcc3-supply = <&vcc_sys>;
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vcc4-supply = <&vcc_sys>;
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vcc6-supply = <&vcc_sys>;
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vcc7-supply = <&vcc_sys>;
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vcc8-supply = <&vcc_io>;
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vcc9-supply = <&vcc_sys>;
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vcc10-supply = <&vcc_sys>;
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vcc11-supply = <&vcc_sys>;
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vcc12-supply = <&vcc_io>;
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clock-output-names = "xin32k", "rk808-clkout2";
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#clock-cells = <1>;
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regulators {
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vdd_cpu: DCDC_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1500000>;
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regulator-name = "vdd_cpu";
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};
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vdd_log: DCDC_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1500000>;
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regulator-name = "vdd_log";
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};
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vcc_ddr: DCDC_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc_ddr";
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};
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vcc_io: DCDC_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc_io";
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};
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vcc18_flash: LDO_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc18_flash";
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};
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vcc33_lcd: LDO_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc33_lcd";
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};
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vdd_10: LDO_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vdd_10";
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};
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vcca_18: LDO_REG4 {
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcca_18";
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};
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vccio_sd: LDO_REG5 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vccio_sd";
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};
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vdd10_lcd: LDO_REG6 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vdd10_lcd";
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};
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vcc_18: LDO_REG7 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc_18";
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};
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vcc18_lcd: LDO_REG8 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc18_lcd";
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};
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vcc_sd: SWITCH_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc_sd";
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};
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vcc_lan: SWITCH_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc_lan";
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};
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};
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};
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};
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&pinctrl {
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ir {
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ir_int: ir-int {
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rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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keys {
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pwr_key: pwr-key {
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rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pmic {
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pmic_sleep: pmic-sleep {
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rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
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};
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pmic_int: pmic-int {
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rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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&tsadc {
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status = "okay";
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rockchip,hw-tshut-mode = <0>; /* CRU */
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rockchip,hw-tshut-polarity = <1>; /* high */
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};
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&uart2 {
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status = "okay";
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};
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&usb_host0_ehci {
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status = "okay";
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};
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&usb_otg {
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status = "okay";
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};
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&wdt {
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status = "okay";
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};
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@ -42,6 +42,7 @@
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/dts-v1/;
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#include "rk3368.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "Rockchip R88";
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@ -65,16 +66,14 @@
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keys: gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwr_key>;
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button@0 {
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power {
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wakeup-source;
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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label = "GPIO Power";
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linux,code = <116>;
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linux,code = <KEY_POWER>;
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};
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};
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@ -185,7 +184,6 @@
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};
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&emmc {
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broken-cd;
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bus-width = <8>;
|
||||
cap-mmc-highspeed;
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disable-wp;
|
||||
|
@ -555,6 +555,18 @@
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status = "disabled";
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||||
};
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mbox: mbox@ff6b0000 {
|
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compatible = "rockchip,rk3368-mailbox";
|
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reg = <0x0 0xff6b0000 0x0 0x1000>;
|
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interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
|
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<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru PCLK_MAILBOX>;
|
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clock-names = "pclk_mailbox";
|
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#mbox-cells = <1>;
|
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};
|
||||
|
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pmugrf: syscon@ff738000 {
|
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compatible = "rockchip,rk3368-pmugrf", "syscon";
|
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reg = <0x0 0xff738000 0x0 0x1000>;
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@ -926,11 +938,11 @@
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tsadc {
|
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otp_gpio: otp-gpio {
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rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
|
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rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
otp_out: otp-out {
|
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rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
|
||||
rockchip,pins = <0 3 RK_FUNC_1 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
|
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