renegade-project/linux-next
2
0
Fork 0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-11-19 08:05:27 +08:00
Code

powerpc/85xx: Add new LAW & ECM device tree nodes for all 85xx systems

Browse Source 
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala 2009-04-22 13:17:42 -05:00
parent 6ca05ee11f
commit e1a2289736
22 changed files with 286 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
arch/powerpc/boot/dts/ksi8560.dts
View File

@ -56,6 +56,19 @@
ranges = <0x00000000 0xfdf00000 0x00100000>;
bus-frequency = <0>; /* Fixed by bootwrapper */
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <8>;
};
ecm@1000 {
compatible = "fsl,mpc8560-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8540-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/mpc8536ds.dts
View File

@ -54,6 +54,19 @@
reg = <0xffe00000 0x1000>;
bus-frequency = <0>; // Filled out by uboot.
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <12>;
};
ecm@1000 {
compatible = "fsl,mpc8536-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8536-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/mpc8540ads.dts
View File

@ -58,6 +58,19 @@
reg = <0xe0000000 0x100000>; // CCSRBAR 1M
bus-frequency = <0>;
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <8>;
};
ecm@1000 {
compatible = "fsl,mpc8540-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,8540-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/mpc8541cds.dts
View File

@ -58,6 +58,19 @@
reg = <0xe0000000 0x1000>; // CCSRBAR 1M
bus-frequency = <0>;
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <8>;
};
ecm@1000 {
compatible = "fsl,mpc8541-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,8541-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/mpc8544ds.dts
View File

@ -60,6 +60,19 @@
reg = <0xe0000000 0x1000>; // CCSRBAR 1M
bus-frequency = <0>; // Filled out by uboot.
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
ecm@1000 {
compatible = "fsl,mpc8544-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,8544-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/mpc8548cds.dts
View File

@ -63,6 +63,19 @@
reg = <0xe0000000 0x1000>; // CCSRBAR
bus-frequency = <0>;
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
ecm@1000 {
compatible = "fsl,mpc8548-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,8548-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/mpc8555cds.dts
View File

@ -58,6 +58,19 @@
reg = <0xe0000000 0x1000>; // CCSRBAR 1M
bus-frequency = <0>;
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <8>;
};
ecm@1000 {
compatible = "fsl,mpc8555-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,8555-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/mpc8560ads.dts
View File

@ -58,6 +58,19 @@
reg = <0xe0000000 0x200>;
bus-frequency = <330000000>;
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <8>;
};
ecm@1000 {
compatible = "fsl,mpc8560-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,8540-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/mpc8568mds.dts
View File

@ -65,6 +65,19 @@
reg = <0xe0000000 0x1000>;
bus-frequency = <0>;
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
ecm@1000 {
compatible = "fsl,mpc8568-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,8568-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/mpc8572ds.dts
View File

@ -185,6 +185,19 @@
reg = <0 0xffe00000 0 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed
bus-frequency = <0>; // Filled out by uboot.
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <12>;
};
ecm@1000 {
compatible = "fsl,mpc8572-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8572-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/mpc8572ds_36b.dts
View File

@ -185,6 +185,19 @@
reg = <0xf 0xffe00000 0 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed
bus-frequency = <0>; // Filled out by uboot.
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <12>;
};
ecm@1000 {
compatible = "fsl,mpc8572-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8572-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
View File

@ -62,6 +62,19 @@
reg = <0xffe00000 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed
bus-frequency = <0>; // Filled out by uboot.
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <12>;
};
ecm@1000 {
compatible = "fsl,mpc8572-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8572-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/sbc8548.dts
View File

@ -155,6 +155,19 @@
bus-frequency = <0>;
compatible = "simple-bus";
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
ecm@1000 {
compatible = "fsl,mpc8548-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8548-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/sbc8560.dts
View File

@ -60,6 +60,19 @@
reg = <0xff700000 0x00100000>;
clock-frequency = <0>;
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <8>;
};
ecm@1000 {
compatible = "fsl,mpc8560-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8560-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/socrates.dts
View File

@ -59,6 +59,19 @@
bus-frequency = <0>; // Filled in by U-Boot
compatible = "fsl,mpc8544-immr", "simple-bus";
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
ecm@1000 {
compatible = "fsl,mpc8544-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8544-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/stx_gp3_8560.dts
View File

@ -56,6 +56,19 @@
bus-frequency = <0>;
compatible = "fsl,mpc8560-immr", "simple-bus";
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <8>;
};
ecm@1000 {
compatible = "fsl,mpc8560-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8540-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/tqm8540.dts
View File

@ -58,6 +58,19 @@
bus-frequency = <0>;
compatible = "fsl,mpc8540-immr", "simple-bus";
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <8>;
};
ecm@1000 {
compatible = "fsl,mpc8540-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8540-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/tqm8541.dts
View File

@ -57,6 +57,19 @@
bus-frequency = <0>;
compatible = "fsl,mpc8541-immr", "simple-bus";
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <8>;
};
ecm@1000 {
compatible = "fsl,mpc8541-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8540-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/tqm8548-bigflash.dts
View File

@ -59,6 +59,19 @@
bus-frequency = <0>;
compatible = "fsl,mpc8548-immr", "simple-bus";
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
ecm@1000 {
compatible = "fsl,mpc8548-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8548-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/tqm8548.dts
View File

@ -59,6 +59,19 @@
bus-frequency = <0>;
compatible = "fsl,mpc8548-immr", "simple-bus";
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
ecm@1000 {
compatible = "fsl,mpc8548-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8548-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/tqm8555.dts
View File

@ -57,6 +57,19 @@
bus-frequency = <0>;
compatible = "fsl,mpc8555-immr", "simple-bus";
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <8>;
};
ecm@1000 {
compatible = "fsl,mpc8555-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8540-memory-controller";
reg = <0x2000 0x1000>;

13
arch/powerpc/boot/dts/tqm8560.dts
View File

@ -59,6 +59,19 @@
bus-frequency = <0>;
compatible = "fsl,mpc8560-immr", "simple-bus";
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <8>;
};
ecm@1000 {
compatible = "fsl,mpc8560-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8540-memory-controller";
reg = <0x2000 0x1000>;