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spi: altera: Switch to SPI core transfer queue management
The Altera SPI driver currently uses the spi-bitbang infrastructure for transfer queue management, but non of the bitbang functionality itself. This is because when the driver was written this was the only way to not have to do queue management in the driver itself. Nowadays transfer queue management is available from the SPI driver core itself and using the bitbang infrastructure just adds an additional level of indirection. Switch the driver over to using the core queue management directly. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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5771a8c088
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@ -55,7 +55,6 @@ comment "SPI Master Controller Drivers"
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config SPI_ALTERA
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tristate "Altera SPI Controller"
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select SPI_BITBANG
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help
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This is the driver for the Altera SPI Controller.
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@ -18,7 +18,6 @@
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_bitbang.h>
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#include <linux/io.h>
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#include <linux/of.h>
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@ -45,10 +44,6 @@
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#define ALTERA_SPI_CONTROL_SSO_MSK 0x400
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struct altera_spi {
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/* bitbang has to be first */
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struct spi_bitbang bitbang;
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struct completion done;
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void __iomem *base;
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int irq;
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int len;
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@ -66,39 +61,18 @@ static inline struct altera_spi *altera_spi_to_hw(struct spi_device *sdev)
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return spi_master_get_devdata(sdev->master);
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}
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static void altera_spi_chipsel(struct spi_device *spi, int value)
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static void altera_spi_set_cs(struct spi_device *spi, bool is_high)
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{
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struct altera_spi *hw = altera_spi_to_hw(spi);
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if (spi->mode & SPI_CS_HIGH) {
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switch (value) {
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case BITBANG_CS_INACTIVE:
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writel(1 << spi->chip_select,
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hw->base + ALTERA_SPI_SLAVE_SEL);
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hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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break;
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case BITBANG_CS_ACTIVE:
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hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
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break;
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}
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if (is_high) {
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hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
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} else {
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switch (value) {
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case BITBANG_CS_INACTIVE:
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hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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break;
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case BITBANG_CS_ACTIVE:
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writel(1 << spi->chip_select,
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hw->base + ALTERA_SPI_SLAVE_SEL);
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hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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break;
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}
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writel(BIT(spi->chip_select), hw->base + ALTERA_SPI_SLAVE_SEL);
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hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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}
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}
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@ -116,9 +90,10 @@ static inline unsigned int hw_txbyte(struct altera_spi *hw, int count)
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return 0;
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}
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static int altera_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
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static int altera_spi_txrx(struct spi_master *master,
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struct spi_device *spi, struct spi_transfer *t)
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{
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struct altera_spi *hw = altera_spi_to_hw(spi);
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struct altera_spi *hw = spi_master_get_devdata(master);
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hw->tx = t->tx_buf;
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hw->rx = t->rx_buf;
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@ -133,11 +108,6 @@ static int altera_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
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/* send the first byte */
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writel(hw_txbyte(hw, 0), hw->base + ALTERA_SPI_TXDATA);
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wait_for_completion(&hw->done);
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/* disable receive interrupt */
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hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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} else {
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while (hw->count < hw->len) {
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unsigned int rxd;
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@ -164,14 +134,16 @@ static int altera_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
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hw->count++;
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}
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spi_finalize_current_transfer(master);
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}
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return hw->count * hw->bytes_per_word;
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return t->len;
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}
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static irqreturn_t altera_spi_irq(int irq, void *dev)
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{
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struct altera_spi *hw = dev;
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struct spi_master *master = dev;
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struct altera_spi *hw = spi_master_get_devdata(master);
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unsigned int rxd;
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rxd = readl(hw->base + ALTERA_SPI_RXDATA);
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@ -189,10 +161,15 @@ static irqreturn_t altera_spi_irq(int irq, void *dev)
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hw->count++;
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if (hw->count < hw->len)
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if (hw->count < hw->len) {
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writel(hw_txbyte(hw, hw->count), hw->base + ALTERA_SPI_TXDATA);
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else
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complete(&hw->done);
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} else {
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/* disable receive interrupt */
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hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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spi_finalize_current_transfer(master);
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}
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return IRQ_HANDLED;
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}
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@ -214,14 +191,10 @@ static int altera_spi_probe(struct platform_device *pdev)
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master->mode_bits = SPI_CS_HIGH;
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master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
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master->dev.of_node = pdev->dev.of_node;
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master->transfer_one = altera_spi_txrx;
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master->set_cs = altera_spi_set_cs;
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hw = spi_master_get_devdata(master);
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platform_set_drvdata(pdev, hw);
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/* setup the state for the bitbang driver */
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hw->bitbang.master = master;
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hw->bitbang.chipselect = altera_spi_chipsel;
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hw->bitbang.txrx_bufs = altera_spi_txrx;
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/* find and map our resources */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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@ -239,15 +212,13 @@ static int altera_spi_probe(struct platform_device *pdev)
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/* irq is optional */
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hw->irq = platform_get_irq(pdev, 0);
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if (hw->irq >= 0) {
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init_completion(&hw->done);
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err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
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pdev->name, hw);
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pdev->name, master);
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if (err)
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goto exit;
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}
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/* register our spi controller */
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err = spi_bitbang_start(&hw->bitbang);
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err = devm_spi_register_master(&pdev->dev, master);
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if (err)
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goto exit;
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dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq);
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@ -258,16 +229,6 @@ exit:
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return err;
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}
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static int altera_spi_remove(struct platform_device *dev)
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{
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struct altera_spi *hw = platform_get_drvdata(dev);
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struct spi_master *master = hw->bitbang.master;
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spi_bitbang_stop(&hw->bitbang);
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spi_master_put(master);
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id altera_spi_match[] = {
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{ .compatible = "ALTR,spi-1.0", },
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@ -279,7 +240,6 @@ MODULE_DEVICE_TABLE(of, altera_spi_match);
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static struct platform_driver altera_spi_driver = {
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.probe = altera_spi_probe,
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.remove = altera_spi_remove,
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.driver = {
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.name = DRV_NAME,
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.pm = NULL,
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