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hpt366: rework rate filtering
- Rework hpt3xx_ratemask() and hpt3xx_ratefilter() so that the former returns the max. mode computed at the load time and doesn't have to do bad Ultra33 drive list lookups anymore; remove the duplicate code from the latter function. Move the quirky drive list lookup into hpt3xx_quirkproc() where it should have been from the start... - Disable UltraATA/100 for HPT370 by default as the 33 MHz ATA clock being used does not allow for it, and this *greatly* increases the transfer speed. - Save some space by using byte-wide fields in struct hpt_info; switch to reading the 8-bit PCI revision ID reg. only, not the whole 32-bit reg. - Start incrementing the driver version number with each patch (should have been done from the first one posted). Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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@ -1,5 +1,5 @@
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/*
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* linux/drivers/ide/pci/hpt366.c Version 0.36 April 25, 2003
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* linux/drivers/ide/pci/hpt366.c Version 0.43 May 17, 2006
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*
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* Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
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* Portions Copyright (C) 2001 Sun Microsystems, Inc.
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@ -62,8 +62,8 @@
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* be done on 66 MHz PCI bus
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* - avoid calibrating PLL twice as the second time results in a wrong PCI
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* frequency and thus in the wrong timings for the secondary channel
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* - disable UltraATA/133 for HPT372 by default (50 MHz DPLL clock do not
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* allow for this speed anyway)
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* - disable UltraATA/133 for HPT372 and UltraATA/100 for HPT370 by default
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* as the ATA clock being used does not allow for this speed anyway
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* - add support for HPT302N and HPT371N clocking (the same as for HPT372N)
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* - HPT371/N are single channel chips, so avoid touching the primary channel
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* which exists only virtually (there's no pins for it)
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@ -76,6 +76,7 @@
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* and for HPT36x the obsolete HDIO_TRISTATE_HWIF handler was called instead
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* - pass to init_chipset() handlers a copy of the IDE PCI device structure as
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* they tamper with its fields
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* - optimize the rate masking/filtering and the drive list lookup code
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* <source@mvista.com>
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*
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*/
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@ -336,7 +337,7 @@ static u32 sixty_six_base_hpt37x[] = {
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#define HPT371_ALLOW_ATA133_6 0
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#define HPT302_ALLOW_ATA133_6 0
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#define HPT372_ALLOW_ATA133_6 0
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#define HPT370_ALLOW_ATA100_5 1
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#define HPT370_ALLOW_ATA100_5 0
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#define HPT366_ALLOW_ATA66_4 1
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#define HPT366_ALLOW_ATA66_3 1
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#define HPT366_MAX_DEVS 8
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@ -354,8 +355,8 @@ static u32 sixty_six_base_hpt37x[] = {
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struct hpt_info
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{
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u8 max_mode; /* Speeds allowed */
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int revision; /* Chipset revision */
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int flags; /* Chipset properties */
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u8 revision; /* Chipset revision */
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u8 flags; /* Chipset properties */
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#define PLL_MODE 1
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#define IS_3xxN 2
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#define PCI_66MHZ 4
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@ -364,61 +365,50 @@ struct hpt_info
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};
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/*
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* This wants fixing so that we do everything not by classrev
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* This wants fixing so that we do everything not by revision
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* (which breaks on the newest chips) but by creating an
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* enumeration of chip variants and using that
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*/
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static __devinit u32 hpt_revision (struct pci_dev *dev)
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static __devinit u8 hpt_revision(struct pci_dev *dev)
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{
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u32 class_rev;
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pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
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class_rev &= 0xff;
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u8 rev = 0;
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pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
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switch(dev->device) {
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/* Remap new 372N onto 372 */
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case PCI_DEVICE_ID_TTI_HPT372N:
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class_rev = PCI_DEVICE_ID_TTI_HPT372; break;
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rev = PCI_DEVICE_ID_TTI_HPT372; break;
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case PCI_DEVICE_ID_TTI_HPT374:
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class_rev = PCI_DEVICE_ID_TTI_HPT374; break;
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rev = PCI_DEVICE_ID_TTI_HPT374; break;
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case PCI_DEVICE_ID_TTI_HPT371:
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class_rev = PCI_DEVICE_ID_TTI_HPT371; break;
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rev = PCI_DEVICE_ID_TTI_HPT371; break;
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case PCI_DEVICE_ID_TTI_HPT302:
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class_rev = PCI_DEVICE_ID_TTI_HPT302; break;
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rev = PCI_DEVICE_ID_TTI_HPT302; break;
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case PCI_DEVICE_ID_TTI_HPT372:
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class_rev = PCI_DEVICE_ID_TTI_HPT372; break;
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rev = PCI_DEVICE_ID_TTI_HPT372; break;
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default:
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break;
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}
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return class_rev;
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return rev;
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}
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static int check_in_drive_lists(ide_drive_t *drive, const char **list);
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static u8 hpt3xx_ratemask (ide_drive_t *drive)
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static int check_in_drive_list(ide_drive_t *drive, const char **list)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct hpt_info *info = ide_get_hwifdata(hwif);
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u8 mode = 0;
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struct hd_driveid *id = drive->id;
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/* FIXME: TODO - move this to set info->mode once at boot */
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while (*list)
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if (!strcmp(*list++,id->model))
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return 1;
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return 0;
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}
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static u8 hpt3xx_ratemask(ide_drive_t *drive)
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{
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struct hpt_info *info = ide_get_hwifdata(HWIF(drive));
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u8 mode = info->max_mode;
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if (info->revision >= 8) { /* HPT374 */
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mode = (HPT374_ALLOW_ATA133_6) ? 4 : 3;
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} else if (info->revision >= 7) { /* HPT371 */
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mode = (HPT371_ALLOW_ATA133_6) ? 4 : 3;
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} else if (info->revision >= 6) { /* HPT302 */
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mode = (HPT302_ALLOW_ATA133_6) ? 4 : 3;
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} else if (info->revision >= 5) { /* HPT372 */
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mode = (HPT372_ALLOW_ATA133_6) ? 4 : 3;
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} else if (info->revision >= 4) { /* HPT370A */
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mode = (HPT370_ALLOW_ATA100_5) ? 3 : 2;
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} else if (info->revision >= 3) { /* HPT370 */
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mode = (HPT370_ALLOW_ATA100_5) ? 3 : 2;
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mode = (check_in_drive_lists(drive, bad_ata33)) ? 0 : mode;
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} else { /* HPT366 and HPT368 */
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mode = (check_in_drive_lists(drive, bad_ata33)) ? 0 : 2;
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}
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if (!eighty_ninty_three(drive) && mode)
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mode = min(mode, (u8)1);
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return mode;
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@ -429,16 +419,15 @@ static u8 hpt3xx_ratemask (ide_drive_t *drive)
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* either PIO or UDMA modes 0,4,5
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*/
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static u8 hpt3xx_ratefilter (ide_drive_t *drive, u8 speed)
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static u8 hpt3xx_ratefilter(ide_drive_t *drive, u8 speed)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct hpt_info *info = ide_get_hwifdata(hwif);
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struct hpt_info *info = ide_get_hwifdata(HWIF(drive));
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u8 mode = hpt3xx_ratemask(drive);
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if (drive->media != ide_disk)
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return min(speed, (u8)XFER_PIO_4);
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switch(mode) {
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switch (mode) {
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case 0x04:
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speed = min(speed, (u8)XFER_UDMA_6);
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break;
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@ -446,33 +435,34 @@ static u8 hpt3xx_ratefilter (ide_drive_t *drive, u8 speed)
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speed = min(speed, (u8)XFER_UDMA_5);
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if (info->revision >= 5)
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break;
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if (check_in_drive_lists(drive, bad_ata100_5))
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speed = min(speed, (u8)XFER_UDMA_4);
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break;
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if (!check_in_drive_list(drive, bad_ata100_5))
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goto check_bad_ata33;
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/* fall thru */
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case 0x02:
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speed = min(speed, (u8)XFER_UDMA_4);
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/*
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* CHECK ME, Does this need to be set to 5 ??
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*/
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if (info->revision >= 3)
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break;
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if ((check_in_drive_lists(drive, bad_ata66_4)) ||
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(!(HPT366_ALLOW_ATA66_4)))
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goto check_bad_ata33;
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if (HPT366_ALLOW_ATA66_4 &&
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!check_in_drive_list(drive, bad_ata66_4))
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goto check_bad_ata33;
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speed = min(speed, (u8)XFER_UDMA_3);
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if ((check_in_drive_lists(drive, bad_ata66_3)) ||
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(!(HPT366_ALLOW_ATA66_3)))
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speed = min(speed, (u8)XFER_UDMA_2);
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break;
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if (HPT366_ALLOW_ATA66_3 &&
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!check_in_drive_list(drive, bad_ata66_3))
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goto check_bad_ata33;
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/* fall thru */
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case 0x01:
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speed = min(speed, (u8)XFER_UDMA_2);
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/*
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* CHECK ME, Does this need to be set to 5 ??
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*/
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if (info->revision >= 3)
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check_bad_ata33:
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if (info->revision >= 4)
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break;
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if (check_in_drive_lists(drive, bad_ata33))
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speed = min(speed, (u8)XFER_MW_DMA_2);
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if (!check_in_drive_list(drive, bad_ata33))
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break;
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/* fall thru */
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case 0x00:
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default:
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speed = min(speed, (u8)XFER_MW_DMA_2);
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@ -481,22 +471,6 @@ static u8 hpt3xx_ratefilter (ide_drive_t *drive, u8 speed)
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return speed;
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}
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static int check_in_drive_lists (ide_drive_t *drive, const char **list)
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{
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struct hd_driveid *id = drive->id;
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if (quirk_drives == list) {
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while (*list)
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if (strstr(id->model, *list++))
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return 1;
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} else {
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while (*list)
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if (!strcmp(*list++,id->model))
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return 1;
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}
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return 0;
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}
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static u32 pci_bus_clock_list(u8 speed, u32 *chipset_table)
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{
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int i;
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@ -671,9 +645,15 @@ static int config_chipset_for_dma (ide_drive_t *drive)
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return ide_dma_enable(drive);
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}
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static int hpt3xx_quirkproc (ide_drive_t *drive)
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static int hpt3xx_quirkproc(ide_drive_t *drive)
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{
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return ((int) check_in_drive_lists(drive, quirk_drives));
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struct hd_driveid *id = drive->id;
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const char **list = quirk_drives;
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while (*list)
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if (strstr(id->model, *list++))
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return 1;
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return 0;
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}
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static void hpt3xx_intrproc (ide_drive_t *drive)
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@ -1381,7 +1361,7 @@ static void __devinit init_iops_hpt366(ide_hwif_t *hwif)
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struct hpt_info *info = kzalloc(sizeof(struct hpt_info), GFP_KERNEL);
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struct pci_dev *dev = hwif->pci_dev;
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u16 did = dev->device;
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u8 rid = 0;
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u8 mode, rid = 0;
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if(info == NULL) {
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printk(KERN_WARNING "hpt366: out of memory.\n");
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@ -1395,7 +1375,7 @@ static void __devinit init_iops_hpt366(ide_hwif_t *hwif)
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return;
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}
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pci_read_config_byte(dev, PCI_CLASS_REVISION, &rid);
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pci_read_config_byte(dev, PCI_REVISION_ID, &rid);
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if (( did == PCI_DEVICE_ID_TTI_HPT366 && rid == 6) ||
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((did == PCI_DEVICE_ID_TTI_HPT372 ||
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@ -1404,9 +1384,22 @@ static void __devinit init_iops_hpt366(ide_hwif_t *hwif)
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did == PCI_DEVICE_ID_TTI_HPT372N)
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info->flags |= IS_3xxN;
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info->revision = hpt_revision(dev);
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rid = info->revision = hpt_revision(dev);
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if (rid >= 8) /* HPT374 */
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mode = HPT374_ALLOW_ATA133_6 ? 4 : 3;
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else if (rid >= 7) /* HPT371 and HPT371N */
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mode = HPT371_ALLOW_ATA133_6 ? 4 : 3;
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else if (rid >= 6) /* HPT302 and HPT302N */
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mode = HPT302_ALLOW_ATA133_6 ? 4 : 3;
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else if (rid >= 5) /* HPT372, HPT372A, and HPT372N */
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mode = HPT372_ALLOW_ATA133_6 ? 4 : 3;
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else if (rid >= 3) /* HPT370 and HPT370A */
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mode = HPT370_ALLOW_ATA100_5 ? 3 : 2;
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else /* HPT366 and HPT368 */
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mode = (HPT366_ALLOW_ATA66_4 || HPT366_ALLOW_ATA66_3) ? 2 : 1;
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info->max_mode = mode;
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if (info->revision >= 3)
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if (rid >= 3)
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hpt37x_clocking(hwif);
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else
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hpt366_clocking(hwif);
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@ -1461,8 +1454,7 @@ static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d)
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static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d)
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{
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struct pci_dev *findev = NULL;
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u8 pin1 = 0, pin2 = 0;
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unsigned int class_rev;
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u8 rev = 0, pin1 = 0, pin2 = 0;
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char *chipset_names[] = {"HPT366", "HPT366", "HPT368",
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"HPT370", "HPT370A", "HPT372",
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"HPT372N" };
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@ -1470,16 +1462,15 @@ static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d)
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if (PCI_FUNC(dev->devfn) & 1)
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return -ENODEV;
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pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
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class_rev &= 0xff;
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pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
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if(dev->device == PCI_DEVICE_ID_TTI_HPT372N)
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class_rev = 6;
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rev = 6;
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if(class_rev <= 6)
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d->name = chipset_names[class_rev];
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if(rev <= 6)
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d->name = chipset_names[rev];
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switch(class_rev) {
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switch(rev) {
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case 6:
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case 5:
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case 4:
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