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pinctrl: intel: Fix a glitch when updating IRQ flags on a preconfigured line
The commitaf7e3eeb84
("pinctrl: intel: Disable input and output buffer when switching to GPIO") hadn't taken into account an update of the IRQ flags scenario. When updating the IRQ flags on the preconfigured line the ->irq_set_type() is called again. In such case the sequential Rx buffer configuration changes may trigger a falling or rising edge interrupt that may lead, on some platforms, to an undesired event. This may happen because each of intel_gpio_set_gpio_mode() and __intel_gpio_set_direction() updates the pad configuration with a different value of the GPIORXDIS bit. Notable, that the intel_gpio_set_gpio_mode() is called only for the pads that are configured as an input. Due to this fact, integrate the logic of __intel_gpio_set_direction() call into the intel_gpio_set_gpio_mode() so that the Rx buffer won't be disabled and immediately re-enabled. Fixes:af7e3eeb84
("pinctrl: intel: Disable input and output buffer when switching to GPIO") Reported-by: Kane Chen <kane.chen@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Tested-by: Grace Kao <grace.kao@intel.com>
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@ -451,8 +451,8 @@ static void intel_gpio_set_gpio_mode(void __iomem *padcfg0)
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value &= ~PADCFG0_PMODE_MASK;
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value |= PADCFG0_PMODE_GPIO;
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/* Disable input and output buffers */
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value |= PADCFG0_GPIORXDIS;
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/* Disable TX buffer and enable RX (this will be input) */
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value &= ~PADCFG0_GPIORXDIS;
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value |= PADCFG0_GPIOTXDIS;
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/* Disable SCI/SMI/NMI generation */
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@ -497,9 +497,6 @@ static int intel_gpio_request_enable(struct pinctrl_dev *pctldev,
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intel_gpio_set_gpio_mode(padcfg0);
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/* Disable TX buffer and enable RX (this will be input) */
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__intel_gpio_set_direction(padcfg0, true);
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raw_spin_unlock_irqrestore(&pctrl->lock, flags);
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return 0;
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@ -1115,9 +1112,6 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned int type)
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intel_gpio_set_gpio_mode(reg);
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/* Disable TX buffer and enable RX (this will be input) */
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__intel_gpio_set_direction(reg, true);
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value = readl(reg);
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value &= ~(PADCFG0_RXEVCFG_MASK | PADCFG0_RXINV);
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