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Code

drm/etnaviv: move gpu_va() to etnaviv mmu

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The GPU virtual address for the command buffers differs depending on
the IOMMU version. Move the calculation of the iova into etnaviv
mmu, to enable proper dispatch.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
This commit is contained in:
Lucas Stach 2016-08-17 14:57:51 +02:00
parent 47cf62b8e0
commit e07c0db5e8
4 changed files with 16 additions and 11 deletions
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16
drivers/gpu/drm/etnaviv/etnaviv_buffer.c
View File

@ -117,11 +117,6 @@ static void etnaviv_cmd_select_pipe(struct etnaviv_gpu *gpu,
VIVS_GL_PIPE_SELECT_PIPE(pipe)); VIVS_GL_PIPE_SELECT_PIPE(pipe));
} }
static u32 gpu_va(struct etnaviv_gpu *gpu, struct etnaviv_cmdbuf *buf)
{
return buf->paddr - gpu->memory_base;
}
static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu,
struct etnaviv_cmdbuf *buf, u32 off, u32 len) struct etnaviv_cmdbuf *buf, u32 off, u32 len)
{ {
@ -129,7 +124,7 @@ static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu,
u32 *ptr = buf->vaddr + off; u32 *ptr = buf->vaddr + off;
dev_info(gpu->dev, "virt %p phys 0x%08x free 0x%08x\n", dev_info(gpu->dev, "virt %p phys 0x%08x free 0x%08x\n",
ptr, gpu_va(gpu, buf) + off, size - len * 4 - off); ptr, etnaviv_iommu_get_cmdbuf_va(gpu, buf) + off, size - len * 4 - off);
print_hex_dump(KERN_INFO, "cmd ", DUMP_PREFIX_OFFSET, 16, 4, print_hex_dump(KERN_INFO, "cmd ", DUMP_PREFIX_OFFSET, 16, 4,
ptr, len * 4, 0); ptr, len * 4, 0);
@ -162,7 +157,7 @@ static u32 etnaviv_buffer_reserve(struct etnaviv_gpu *gpu,
if (buffer->user_size + cmd_dwords * sizeof(u64) > buffer->size) if (buffer->user_size + cmd_dwords * sizeof(u64) > buffer->size)
buffer->user_size = 0; buffer->user_size = 0;
return gpu_va(gpu, buffer) + buffer->user_size; return etnaviv_iommu_get_cmdbuf_va(gpu, buffer) + buffer->user_size;
} }
u16 etnaviv_buffer_init(struct etnaviv_gpu *gpu) u16 etnaviv_buffer_init(struct etnaviv_gpu *gpu)
@ -173,7 +168,8 @@ u16 etnaviv_buffer_init(struct etnaviv_gpu *gpu)
buffer->user_size = 0; buffer->user_size = 0;
CMD_WAIT(buffer); CMD_WAIT(buffer);
CMD_LINK(buffer, 2, gpu_va(gpu, buffer) + buffer->user_size - 4); CMD_LINK(buffer, 2, etnaviv_iommu_get_cmdbuf_va(gpu, buffer) +
buffer->user_size - 4);
return buffer->user_size / 8; return buffer->user_size / 8;
} }
@ -231,7 +227,7 @@ void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, unsigned int event,
if (drm_debug & DRM_UT_DRIVER) if (drm_debug & DRM_UT_DRIVER)
etnaviv_buffer_dump(gpu, buffer, 0, 0x50); etnaviv_buffer_dump(gpu, buffer, 0, 0x50);
link_target = gpu_va(gpu, cmdbuf); link_target = etnaviv_iommu_get_cmdbuf_va(gpu, cmdbuf);
link_dwords = cmdbuf->size / 8; link_dwords = cmdbuf->size / 8;
/* /*
@ -301,7 +297,7 @@ void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, unsigned int event,
if (drm_debug & DRM_UT_DRIVER) if (drm_debug & DRM_UT_DRIVER)
pr_info("stream link to 0x%08x @ 0x%08x %p\n", pr_info("stream link to 0x%08x @ 0x%08x %p\n",
return_target, gpu_va(gpu, cmdbuf), cmdbuf->vaddr); return_target, etnaviv_iommu_get_cmdbuf_va(gpu, cmdbuf), cmdbuf->vaddr);
if (drm_debug & DRM_UT_DRIVER) { if (drm_debug & DRM_UT_DRIVER) {
print_hex_dump(KERN_INFO, "cmd ", DUMP_PREFIX_OFFSET, 16, 4, print_hex_dump(KERN_INFO, "cmd ", DUMP_PREFIX_OFFSET, 16, 4,

2
drivers/gpu/drm/etnaviv/etnaviv_gpu.c
View File

@ -574,7 +574,7 @@ static void etnaviv_gpu_hw_init(struct etnaviv_gpu *gpu)
gpu_write(gpu, VIVS_HI_INTR_ENBL, ~0U); gpu_write(gpu, VIVS_HI_INTR_ENBL, ~0U);
gpu_write(gpu, VIVS_FE_COMMAND_ADDRESS, gpu_write(gpu, VIVS_FE_COMMAND_ADDRESS,
gpu->buffer->paddr - gpu->memory_base); etnaviv_iommu_get_cmdbuf_va(gpu, gpu->buffer));
gpu_write(gpu, VIVS_FE_COMMAND_CONTROL, gpu_write(gpu, VIVS_FE_COMMAND_CONTROL,
VIVS_FE_COMMAND_CONTROL_ENABLE | VIVS_FE_COMMAND_CONTROL_ENABLE |
VIVS_FE_COMMAND_CONTROL_PREFETCH(prefetch)); VIVS_FE_COMMAND_CONTROL_PREFETCH(prefetch));

6
drivers/gpu/drm/etnaviv/etnaviv_mmu.c
View File

@ -304,6 +304,12 @@ void etnaviv_iommu_restore(struct etnaviv_gpu *gpu)
dev_err(gpu->dev, "IOMMUv2 restore not implemented\n"); dev_err(gpu->dev, "IOMMUv2 restore not implemented\n");
} }
u32 etnaviv_iommu_get_cmdbuf_va(struct etnaviv_gpu *gpu,
struct etnaviv_cmdbuf *buf)
{
return buf->paddr - gpu->memory_base;
}
size_t etnaviv_iommu_dump_size(struct etnaviv_iommu *iommu) size_t etnaviv_iommu_dump_size(struct etnaviv_iommu *iommu)
{ {
struct etnaviv_iommu_ops *ops; struct etnaviv_iommu_ops *ops;

3
drivers/gpu/drm/etnaviv/etnaviv_mmu.h
View File

@ -62,6 +62,9 @@ void etnaviv_iommu_unmap_gem(struct etnaviv_iommu *mmu,
struct etnaviv_vram_mapping *mapping); struct etnaviv_vram_mapping *mapping);
void etnaviv_iommu_destroy(struct etnaviv_iommu *iommu); void etnaviv_iommu_destroy(struct etnaviv_iommu *iommu);
u32 etnaviv_iommu_get_cmdbuf_va(struct etnaviv_gpu *gpu,
struct etnaviv_cmdbuf *buf);
size_t etnaviv_iommu_dump_size(struct etnaviv_iommu *iommu); size_t etnaviv_iommu_dump_size(struct etnaviv_iommu *iommu);
void etnaviv_iommu_dump(struct etnaviv_iommu *iommu, void *buf); void etnaviv_iommu_dump(struct etnaviv_iommu *iommu, void *buf);