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crypto: mediatek - add support to CTR mode
This patch adds support to the CTR mode. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Ryder Lee
Herbert Xu
parent
059b14947a
commit
e04a31d7f5
@ -23,8 +23,10 @@
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/* AES command token size */
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#define AES_CT_SIZE_ECB 2
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#define AES_CT_SIZE_CBC 3
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#define AES_CT_SIZE_CTR 3
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#define AES_CT_CTRL_HDR cpu_to_le32(0x00220000)
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/* AES-CBC/ECB command token */
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/* AES-CBC/ECB/CTR command token */
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#define AES_CMD0 cpu_to_le32(0x05000000)
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#define AES_CMD1 cpu_to_le32(0x2d060000)
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#define AES_CMD2 cpu_to_le32(0xe4a63806)
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@ -39,13 +41,15 @@
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/* AES transform information word 1 fields */
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#define AES_TFM_ECB cpu_to_le32(0x0 << 0)
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#define AES_TFM_CBC cpu_to_le32(0x1 << 0)
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#define AES_TFM_FULL_IV cpu_to_le32(0xf << 5)
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#define AES_TFM_CTR_LOAD cpu_to_le32(0x6 << 0) /* load/reuse counter */
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#define AES_TFM_FULL_IV cpu_to_le32(0xf << 5) /* using IV 0-3 */
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/* AES flags */
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#define AES_FLAGS_ECB BIT(0)
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#define AES_FLAGS_CBC BIT(1)
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#define AES_FLAGS_ENCRYPT BIT(2)
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#define AES_FLAGS_BUSY BIT(3)
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#define AES_FLAGS_CTR BIT(2)
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#define AES_FLAGS_ENCRYPT BIT(3)
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#define AES_FLAGS_BUSY BIT(4)
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/**
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* Command token(CT) is a set of hardware instructions that
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@ -90,6 +94,15 @@ struct mtk_aes_ctx {
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struct mtk_aes_base_ctx base;
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};
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struct mtk_aes_ctr_ctx {
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struct mtk_aes_base_ctx base;
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u32 iv[AES_BLOCK_SIZE / sizeof(u32)];
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size_t offset;
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struct scatterlist src[2];
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struct scatterlist dst[2];
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};
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struct mtk_aes_drv {
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struct list_head dev_list;
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/* Device list lock */
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@ -332,7 +345,7 @@ tfm_map_err:
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return -EINVAL;
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}
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/* Initialize transform information of CBC/ECB mode */
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/* Initialize transform information of CBC/ECB/CTR mode */
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static void mtk_aes_info_init(struct mtk_cryp *cryp, struct mtk_aes_rec *aes,
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size_t len)
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{
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@ -374,6 +387,13 @@ static void mtk_aes_info_init(struct mtk_cryp *cryp, struct mtk_aes_rec *aes,
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ctx->tfm.ctrl[1] = AES_TFM_ECB;
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ctx->ct_size = AES_CT_SIZE_ECB;
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} else if (aes->flags & AES_FLAGS_CTR) {
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ctx->tfm.ctrl[0] |= AES_TFM_SIZE(ctx->keylen +
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SIZE_IN_WORDS(AES_BLOCK_SIZE));
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ctx->tfm.ctrl[1] = AES_TFM_CTR_LOAD | AES_TFM_FULL_IV;
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ctx->ct.cmd[2] = AES_CMD2;
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ctx->ct_size = AES_CT_SIZE_CTR;
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}
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}
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@ -479,6 +499,80 @@ static int mtk_aes_start(struct mtk_cryp *cryp, struct mtk_aes_rec *aes)
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return mtk_aes_dma(cryp, aes, req->src, req->dst, req->nbytes);
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}
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static inline struct mtk_aes_ctr_ctx *
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mtk_aes_ctr_ctx_cast(struct mtk_aes_base_ctx *ctx)
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{
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return container_of(ctx, struct mtk_aes_ctr_ctx, base);
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}
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static int mtk_aes_ctr_transfer(struct mtk_cryp *cryp, struct mtk_aes_rec *aes)
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{
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struct mtk_aes_base_ctx *ctx = aes->ctx;
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struct mtk_aes_ctr_ctx *cctx = mtk_aes_ctr_ctx_cast(ctx);
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struct ablkcipher_request *req = ablkcipher_request_cast(aes->areq);
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struct scatterlist *src, *dst;
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int i;
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u32 start, end, ctr, blocks, *iv_state;
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size_t datalen;
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bool fragmented = false;
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/* Check for transfer completion. */
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cctx->offset += aes->total;
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if (cctx->offset >= req->nbytes)
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return mtk_aes_complete(cryp, aes);
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/* Compute data length. */
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datalen = req->nbytes - cctx->offset;
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blocks = DIV_ROUND_UP(datalen, AES_BLOCK_SIZE);
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ctr = be32_to_cpu(cctx->iv[3]);
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/* Check 32bit counter overflow. */
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start = ctr;
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end = start + blocks - 1;
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if (end < start) {
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ctr |= 0xffffffff;
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datalen = AES_BLOCK_SIZE * -start;
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fragmented = true;
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}
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/* Jump to offset. */
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src = scatterwalk_ffwd(cctx->src, req->src, cctx->offset);
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dst = ((req->src == req->dst) ? src :
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scatterwalk_ffwd(cctx->dst, req->dst, cctx->offset));
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/* Write IVs into transform state buffer. */
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iv_state = ctx->tfm.state + ctx->keylen;
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for (i = 0; i < SIZE_IN_WORDS(AES_BLOCK_SIZE); i++)
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iv_state[i] = cpu_to_le32(cctx->iv[i]);
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if (unlikely(fragmented)) {
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/*
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* Increment the counter manually to cope with the hardware
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* counter overflow.
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*/
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cctx->iv[3] = cpu_to_be32(ctr);
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crypto_inc((u8 *)cctx->iv, AES_BLOCK_SIZE);
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}
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aes->resume = mtk_aes_ctr_transfer;
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return mtk_aes_dma(cryp, aes, src, dst, datalen);
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}
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static int mtk_aes_ctr_start(struct mtk_cryp *cryp, struct mtk_aes_rec *aes)
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{
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struct mtk_aes_ctr_ctx *cctx = mtk_aes_ctr_ctx_cast(aes->ctx);
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struct ablkcipher_request *req = ablkcipher_request_cast(aes->areq);
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struct mtk_aes_reqctx *rctx = ablkcipher_request_ctx(req);
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mtk_aes_set_mode(aes, rctx);
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memcpy(cctx->iv, req->info, AES_BLOCK_SIZE);
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cctx->offset = 0;
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aes->total = 0;
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return mtk_aes_ctr_transfer(cryp, aes);
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}
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/* Check and set the AES key to transform state buffer */
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static int mtk_aes_setkey(struct crypto_ablkcipher *tfm,
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const u8 *key, u32 keylen)
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@ -536,6 +630,16 @@ static int mtk_aes_cbc_decrypt(struct ablkcipher_request *req)
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return mtk_aes_crypt(req, AES_FLAGS_CBC);
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}
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static int mtk_aes_ctr_encrypt(struct ablkcipher_request *req)
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{
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return mtk_aes_crypt(req, AES_FLAGS_ENCRYPT | AES_FLAGS_CTR);
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}
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static int mtk_aes_ctr_decrypt(struct ablkcipher_request *req)
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{
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return mtk_aes_crypt(req, AES_FLAGS_CTR);
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}
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static int mtk_aes_cra_init(struct crypto_tfm *tfm)
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{
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struct mtk_aes_ctx *ctx = crypto_tfm_ctx(tfm);
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@ -552,6 +656,22 @@ static int mtk_aes_cra_init(struct crypto_tfm *tfm)
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return 0;
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}
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static int mtk_aes_ctr_cra_init(struct crypto_tfm *tfm)
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{
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struct mtk_aes_ctx *ctx = crypto_tfm_ctx(tfm);
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struct mtk_cryp *cryp = NULL;
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cryp = mtk_aes_find_dev(&ctx->base);
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if (!cryp) {
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pr_err("can't find crypto device\n");
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return -ENODEV;
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}
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tfm->crt_ablkcipher.reqsize = sizeof(struct mtk_aes_reqctx);
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ctx->base.start = mtk_aes_ctr_start;
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return 0;
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}
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static struct crypto_alg aes_algs[] = {
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{
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.cra_name = "cbc(aes)",
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@ -594,6 +714,27 @@ static struct crypto_alg aes_algs[] = {
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.decrypt = mtk_aes_ecb_decrypt,
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}
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},
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{
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.cra_name = "ctr(aes)",
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.cra_driver_name = "ctr-aes-mtk",
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.cra_priority = 400,
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
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CRYPTO_ALG_ASYNC,
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.cra_init = mtk_aes_ctr_cra_init,
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.cra_blocksize = 1,
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.cra_ctxsize = sizeof(struct mtk_aes_ctr_ctx),
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.cra_alignmask = 0xf,
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.cra_type = &crypto_ablkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_u.ablkcipher = {
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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.setkey = mtk_aes_setkey,
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.encrypt = mtk_aes_ctr_encrypt,
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.decrypt = mtk_aes_ctr_decrypt,
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}
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},
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};
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static void mtk_aes_enc_task(unsigned long data)
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