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mv_xor: support big endian systems using descriptor swap feature
The mv_xor driver had never been used in a big-endian context, and therefore was not using the hardware features to support such an execution environment. The hardware provides a "descriptor swap" bit that automatically swaps the bytes of the DMA descriptors, within blocks of 8 bytes. This requires a different DMA descriptor layout on big-endian systems, as well as enabling this "descriptor swap" bit. This mechanism is exactly identical to the one already used in the mv643xx_eth network driver and the mvneta network driver. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Dan Williams <djbw@fb.com>
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@ -64,7 +64,7 @@ static u32 mv_desc_get_src_addr(struct mv_xor_desc_slot *desc,
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int src_idx)
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int src_idx)
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{
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{
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struct mv_xor_desc *hw_desc = desc->hw_desc;
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struct mv_xor_desc *hw_desc = desc->hw_desc;
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return hw_desc->phy_src_addr[src_idx];
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return hw_desc->phy_src_addr[mv_phy_src_idx(src_idx)];
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}
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}
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@ -107,7 +107,7 @@ static void mv_desc_set_src_addr(struct mv_xor_desc_slot *desc,
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int index, dma_addr_t addr)
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int index, dma_addr_t addr)
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{
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{
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struct mv_xor_desc *hw_desc = desc->hw_desc;
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struct mv_xor_desc *hw_desc = desc->hw_desc;
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hw_desc->phy_src_addr[index] = addr;
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hw_desc->phy_src_addr[mv_phy_src_idx(index)] = addr;
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if (desc->type == DMA_XOR)
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if (desc->type == DMA_XOR)
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hw_desc->desc_command |= (1 << index);
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hw_desc->desc_command |= (1 << index);
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}
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}
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@ -192,6 +192,13 @@ static void mv_set_mode(struct mv_xor_chan *chan,
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config &= ~0x7;
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config &= ~0x7;
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config |= op_mode;
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config |= op_mode;
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#if defined(__BIG_ENDIAN)
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config |= XOR_DESCRIPTOR_SWAP;
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#else
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config &= ~XOR_DESCRIPTOR_SWAP;
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#endif
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writel_relaxed(config, XOR_CONFIG(chan));
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writel_relaxed(config, XOR_CONFIG(chan));
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chan->current_type = type;
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chan->current_type = type;
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}
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}
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@ -29,8 +29,10 @@
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#define MV_XOR_THRESHOLD 1
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#define MV_XOR_THRESHOLD 1
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#define MV_XOR_MAX_CHANNELS 2
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#define MV_XOR_MAX_CHANNELS 2
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/* Values for the XOR_CONFIG register */
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#define XOR_OPERATION_MODE_XOR 0
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#define XOR_OPERATION_MODE_XOR 0
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#define XOR_OPERATION_MODE_MEMCPY 2
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#define XOR_OPERATION_MODE_MEMCPY 2
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#define XOR_DESCRIPTOR_SWAP BIT(14)
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#define XOR_CURR_DESC(chan) (chan->mmr_base + 0x210 + (chan->idx * 4))
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#define XOR_CURR_DESC(chan) (chan->mmr_base + 0x210 + (chan->idx * 4))
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#define XOR_NEXT_DESC(chan) (chan->mmr_base + 0x200 + (chan->idx * 4))
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#define XOR_NEXT_DESC(chan) (chan->mmr_base + 0x200 + (chan->idx * 4))
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@ -143,7 +145,16 @@ struct mv_xor_desc_slot {
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#endif
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#endif
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};
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};
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/* This structure describes XOR descriptor size 64bytes */
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/*
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* This structure describes XOR descriptor size 64bytes. The
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* mv_phy_src_idx() macro must be used when indexing the values of the
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* phy_src_addr[] array. This is due to the fact that the 'descriptor
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* swap' feature, used on big endian systems, swaps descriptors data
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* within blocks of 8 bytes. So two consecutive values of the
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* phy_src_addr[] array are actually swapped in big-endian, which
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* explains the different mv_phy_src_idx() implementation.
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*/
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#if defined(__LITTLE_ENDIAN)
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struct mv_xor_desc {
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struct mv_xor_desc {
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u32 status; /* descriptor execution status */
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u32 status; /* descriptor execution status */
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u32 crc32_result; /* result of CRC-32 calculation */
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u32 crc32_result; /* result of CRC-32 calculation */
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@ -155,6 +166,21 @@ struct mv_xor_desc {
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u32 reserved0;
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u32 reserved0;
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u32 reserved1;
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u32 reserved1;
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};
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};
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#define mv_phy_src_idx(src_idx) (src_idx)
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#else
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struct mv_xor_desc {
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u32 crc32_result; /* result of CRC-32 calculation */
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u32 status; /* descriptor execution status */
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u32 phy_next_desc; /* next descriptor address pointer */
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u32 desc_command; /* type of operation to be carried out */
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u32 phy_dest_addr; /* destination block address */
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u32 byte_count; /* size of src/dst blocks in bytes */
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u32 phy_src_addr[8]; /* source block addresses */
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u32 reserved1;
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u32 reserved0;
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};
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#define mv_phy_src_idx(src_idx) (src_idx ^ 1)
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#endif
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#define to_mv_sw_desc(addr_hw_desc) \
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#define to_mv_sw_desc(addr_hw_desc) \
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container_of(addr_hw_desc, struct mv_xor_desc_slot, hw_desc)
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container_of(addr_hw_desc, struct mv_xor_desc_slot, hw_desc)
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