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https://github.com/edk2-porting/linux-next.git
synced 2024-11-20 00:26:39 +08:00
Merge master.kernel.org:/home/rmk/linux-2.6-mmc
* master.kernel.org:/home/rmk/linux-2.6-mmc:
[MMC] Always use a sector size of 512 bytes
[MMC] Cleanup 385e3227d4
[ARM] 3751/1: i.MX/MX1 SD/MMC use 512 bytes request for SCR read
[MMC] Fix SD timeout calculation
[MMC] constify mmc_host_ops
This commit is contained in:
commit
e004876c3b
@ -91,6 +91,8 @@ struct imxmci_host {
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int dma_allocated;
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unsigned char actual_bus_width;
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int prev_cmd_code;
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};
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#define IMXMCI_PEND_IRQ_b 0
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@ -248,16 +250,14 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
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* partial FIFO fills and reads. The length has to be rounded up to burst size multiple.
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* This is required for SCR read at least.
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*/
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if (datasz < 64) {
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if (datasz < 512) {
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host->dma_size = datasz;
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if (data->flags & MMC_DATA_READ) {
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host->dma_dir = DMA_FROM_DEVICE;
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/* Hack to enable read SCR */
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if(datasz < 16) {
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MMC_NOB = 1;
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MMC_BLK_LEN = 16;
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}
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MMC_NOB = 1;
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MMC_BLK_LEN = 512;
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} else {
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host->dma_dir = DMA_TO_DEVICE;
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}
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@ -409,6 +409,9 @@ static void imxmci_finish_request(struct imxmci_host *host, struct mmc_request *
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spin_unlock_irqrestore(&host->lock, flags);
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if(req && req->cmd)
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host->prev_cmd_code = req->cmd->opcode;
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host->req = NULL;
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host->cmd = NULL;
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host->data = NULL;
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@ -553,7 +556,6 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
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{
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int i;
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int burst_len;
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int flush_len;
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int trans_done = 0;
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unsigned int stat = *pstat;
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@ -566,44 +568,43 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
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dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data running STATUS = 0x%x\n",
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stat);
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udelay(20); /* required for clocks < 8MHz*/
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if(host->dma_dir == DMA_FROM_DEVICE) {
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imxmci_busy_wait_for_status(host, &stat,
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STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE,
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20, "imxmci_cpu_driven_data read");
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50, "imxmci_cpu_driven_data read");
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while((stat & (STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE)) &&
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(host->data_cnt < host->dma_size)) {
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if(burst_len >= host->dma_size - host->data_cnt) {
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flush_len = burst_len;
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burst_len = host->dma_size - host->data_cnt;
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flush_len -= burst_len;
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host->data_cnt = host->dma_size;
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trans_done = 1;
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} else {
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flush_len = 0;
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host->data_cnt += burst_len;
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}
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(host->data_cnt < 512)) {
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udelay(20); /* required for clocks < 8MHz*/
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for(i = burst_len; i>=2 ; i-=2) {
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*(host->data_ptr++) = MMC_BUFFER_ACCESS;
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udelay(20); /* required for clocks < 8MHz*/
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u16 data;
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data = MMC_BUFFER_ACCESS;
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udelay(10); /* required for clocks < 8MHz*/
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if(host->data_cnt+2 <= host->dma_size) {
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*(host->data_ptr++) = data;
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} else {
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if(host->data_cnt < host->dma_size)
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*(u8*)(host->data_ptr) = data;
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}
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host->data_cnt += 2;
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}
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if(i == 1)
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*(u8*)(host->data_ptr) = MMC_BUFFER_ACCESS;
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stat = MMC_STATUS;
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/* Flush extra bytes from FIFO */
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while(flush_len && !(stat & STATUS_DATA_TRANS_DONE)){
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i = MMC_BUFFER_ACCESS;
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stat = MMC_STATUS;
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stat &= ~STATUS_CRC_READ_ERR; /* Stupid but required there */
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}
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dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read burst %d STATUS = 0x%x\n",
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burst_len, stat);
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dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read %d burst %d STATUS = 0x%x\n",
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host->data_cnt, burst_len, stat);
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}
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if((stat & STATUS_DATA_TRANS_DONE) && (host->data_cnt >= 512))
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trans_done = 1;
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if(host->dma_size & 0x1ff)
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stat &= ~STATUS_CRC_READ_ERR;
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} else {
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imxmci_busy_wait_for_status(host, &stat,
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STATUS_APPL_BUFF_FE,
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@ -692,8 +693,8 @@ static void imxmci_tasklet_fnc(unsigned long data)
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what, stat, MMC_INT_MASK);
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dev_err(mmc_dev(host->mmc), "CMD_DAT_CONT = 0x%04x, MMC_BLK_LEN = 0x%04x, MMC_NOB = 0x%04x, DMA_CCR = 0x%08x\n",
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MMC_CMD_DAT_CONT, MMC_BLK_LEN, MMC_NOB, CCR(host->dma));
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dev_err(mmc_dev(host->mmc), "CMD%d, bus %d-bit, dma_size = 0x%x\n",
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host->cmd?host->cmd->opcode:0, 1<<host->actual_bus_width, host->dma_size);
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dev_err(mmc_dev(host->mmc), "CMD%d, prevCMD%d, bus %d-bit, dma_size = 0x%x\n",
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host->cmd?host->cmd->opcode:0, host->prev_cmd_code, 1<<host->actual_bus_width, host->dma_size);
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}
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if(!host->present || timeout)
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@ -247,6 +247,55 @@ int mmc_wait_for_app_cmd(struct mmc_host *host, unsigned int rca,
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EXPORT_SYMBOL(mmc_wait_for_app_cmd);
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/**
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* mmc_set_data_timeout - set the timeout for a data command
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* @data: data phase for command
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* @card: the MMC card associated with the data transfer
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* @write: flag to differentiate reads from writes
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*/
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void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card,
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int write)
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{
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unsigned int mult;
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/*
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* SD cards use a 100 multiplier rather than 10
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*/
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mult = mmc_card_sd(card) ? 100 : 10;
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/*
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* Scale up the multiplier (and therefore the timeout) by
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* the r2w factor for writes.
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*/
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if (write)
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mult <<= card->csd.r2w_factor;
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data->timeout_ns = card->csd.tacc_ns * mult;
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data->timeout_clks = card->csd.tacc_clks * mult;
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/*
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* SD cards also have an upper limit on the timeout.
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*/
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if (mmc_card_sd(card)) {
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unsigned int timeout_us, limit_us;
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timeout_us = data->timeout_ns / 1000;
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timeout_us += data->timeout_clks * 1000 /
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(card->host->ios.clock / 1000);
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if (write)
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limit_us = 250000;
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else
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limit_us = 100000;
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if (timeout_us > limit_us) {
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data->timeout_ns = limit_us * 1000;
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data->timeout_clks = 0;
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}
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}
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}
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EXPORT_SYMBOL(mmc_set_data_timeout);
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static int mmc_select_card(struct mmc_host *host, struct mmc_card *card);
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/**
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@ -908,11 +957,9 @@ static void mmc_read_scrs(struct mmc_host *host)
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{
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int err;
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struct mmc_card *card;
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struct mmc_request mrq;
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struct mmc_command cmd;
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struct mmc_data data;
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struct scatterlist sg;
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list_for_each_entry(card, &host->cards, node) {
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@ -947,8 +994,8 @@ static void mmc_read_scrs(struct mmc_host *host)
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memset(&data, 0, sizeof(struct mmc_data));
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data.timeout_ns = card->csd.tacc_ns * 10;
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data.timeout_clks = card->csd.tacc_clks * 10;
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mmc_set_data_timeout(&data, card, 0);
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data.blksz_bits = 3;
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data.blksz = 1 << 3;
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data.blocks = 1;
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@ -30,6 +30,7 @@
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#include <linux/mutex.h>
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#include <linux/mmc/card.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/protocol.h>
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#include <asm/system.h>
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@ -171,8 +172,6 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
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brq.cmd.arg = req->sector << 9;
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brq.cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
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brq.data.timeout_ns = card->csd.tacc_ns * 10;
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brq.data.timeout_clks = card->csd.tacc_clks * 10;
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brq.data.blksz_bits = md->block_bits;
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brq.data.blksz = 1 << md->block_bits;
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brq.data.blocks = req->nr_sectors >> (md->block_bits - 9);
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@ -180,6 +179,8 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
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brq.stop.arg = 0;
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brq.stop.flags = MMC_RSP_R1B | MMC_CMD_AC;
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mmc_set_data_timeout(&brq.data, card, rq_data_dir(req) != READ);
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if (rq_data_dir(req) == READ) {
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brq.cmd.opcode = brq.data.blocks > 1 ? MMC_READ_MULTIPLE_BLOCK : MMC_READ_SINGLE_BLOCK;
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brq.data.flags |= MMC_DATA_READ;
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@ -187,12 +188,6 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
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brq.cmd.opcode = MMC_WRITE_BLOCK;
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brq.data.flags |= MMC_DATA_WRITE;
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brq.data.blocks = 1;
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/*
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* Scale up the timeout by the r2w factor
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*/
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brq.data.timeout_ns <<= card->csd.r2w_factor;
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brq.data.timeout_clks <<= card->csd.r2w_factor;
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}
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if (brq.data.blocks > 1) {
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@ -324,52 +319,11 @@ static struct mmc_blk_data *mmc_blk_alloc(struct mmc_card *card)
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md->read_only = mmc_blk_readonly(card);
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/*
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* Figure out a workable block size. MMC cards have:
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* - two block sizes, one for read and one for write.
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* - may support partial reads and/or writes
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* (allows block sizes smaller than specified)
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* Both SD and MMC specifications state (although a bit
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* unclearly in the MMC case) that a block size of 512
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* bytes must always be supported by the card.
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*/
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md->block_bits = card->csd.read_blkbits;
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if (card->csd.write_blkbits != card->csd.read_blkbits) {
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if (card->csd.write_blkbits < card->csd.read_blkbits &&
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card->csd.read_partial) {
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/*
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* write block size is smaller than read block
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* size, but we support partial reads, so choose
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* the smaller write block size.
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*/
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md->block_bits = card->csd.write_blkbits;
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} else if (card->csd.write_blkbits > card->csd.read_blkbits &&
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card->csd.write_partial) {
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/*
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* read block size is smaller than write block
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* size, but we support partial writes. Use read
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* block size.
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*/
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} else {
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/*
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* We don't support this configuration for writes.
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*/
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printk(KERN_ERR "%s: unable to select block size for "
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"writing (rb%u wb%u rp%u wp%u)\n",
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mmc_card_id(card),
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1 << card->csd.read_blkbits,
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1 << card->csd.write_blkbits,
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card->csd.read_partial,
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card->csd.write_partial);
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md->read_only = 1;
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}
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}
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/*
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* Refuse to allow block sizes smaller than 512 bytes.
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*/
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if (md->block_bits < 9) {
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printk(KERN_ERR "%s: unable to support block size %u\n",
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mmc_card_id(card), 1 << md->block_bits);
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ret = -EINVAL;
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goto err_kfree;
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}
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md->block_bits = 9;
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md->disk = alloc_disk(1 << MMC_SHIFT);
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if (md->disk == NULL) {
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@ -77,7 +77,7 @@ struct mmc_host {
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struct device *dev;
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struct class_device class_dev;
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int index;
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struct mmc_host_ops *ops;
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const struct mmc_host_ops *ops;
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unsigned int f_min;
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unsigned int f_max;
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u32 ocr_avail;
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@ -105,6 +105,8 @@ extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int);
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extern int mmc_wait_for_app_cmd(struct mmc_host *, unsigned int,
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struct mmc_command *, int);
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extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *, int);
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extern int __mmc_claim_host(struct mmc_host *host, struct mmc_card *card);
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static inline void mmc_claim_host(struct mmc_host *host)
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