renegade-project/linux-next
2
0
Fork 0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-18 18:23:53 +08:00
Code

ARM: tegra: Make variables static

Browse Source 
No need to be public. Checked with:
  $ touch arch/arm/mach-tegra/*[ch] && make C=1

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Hiroshi Doyu 2013-01-03 08:27:05 +02:00 committed by Stephen Warren
parent 37340866fb
commit deeb8d1948
5 changed files with 12 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-tegra/apbio.c
View File

@ -38,7 +38,7 @@ static void tegra_apb_writel_direct(u32 value, unsigned long offset);
static struct dma_chan *tegra_apb_dma_chan;
static struct dma_slave_config dma_sconfig;
bool tegra_apb_dma_init(void)
static bool tegra_apb_dma_init(void)
{
dma_cap_mask_t mask;

10
arch/arm/mach-tegra/board-dt-tegra20.c
View File

@ -46,31 +46,31 @@
#include "common.h"
#include "iomap.h"
struct tegra_ehci_platform_data tegra_ehci1_pdata = {
static struct tegra_ehci_platform_data tegra_ehci1_pdata = {
.operating_mode = TEGRA_USB_OTG,
.power_down_on_bus_suspend = 1,
.vbus_gpio = -1,
};
struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
.reset_gpio = -1,
.clk = "cdev2",
};
struct tegra_ehci_platform_data tegra_ehci2_pdata = {
static struct tegra_ehci_platform_data tegra_ehci2_pdata = {
.phy_config = &tegra_ehci2_ulpi_phy_config,
.operating_mode = TEGRA_USB_HOST,
.power_down_on_bus_suspend = 1,
.vbus_gpio = -1,
};
struct tegra_ehci_platform_data tegra_ehci3_pdata = {
static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
.operating_mode = TEGRA_USB_HOST,
.power_down_on_bus_suspend = 1,
.vbus_gpio = -1,
};
struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
static struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),

2
arch/arm/mach-tegra/board-dt-tegra30.c
View File

@ -39,7 +39,7 @@
#include "common.h"
#include "iomap.h"
struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
static struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000200, "sdhci-tegra.1", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000400, "sdhci-tegra.2", NULL),

4
arch/arm/mach-tegra/flowctrl.c
View File

@ -26,14 +26,14 @@
#include "flowctrl.h"
#include "iomap.h"
u8 flowctrl_offset_halt_cpu[] = {
static u8 flowctrl_offset_halt_cpu[] = {
FLOW_CTRL_HALT_CPU0_EVENTS,
FLOW_CTRL_HALT_CPU1_EVENTS,
FLOW_CTRL_HALT_CPU1_EVENTS + 8,
FLOW_CTRL_HALT_CPU1_EVENTS + 16,
};
u8 flowctrl_offset_cpu_csr[] = {
static u8 flowctrl_offset_cpu_csr[] = {
FLOW_CTRL_CPU0_CSR,
FLOW_CTRL_CPU1_CSR,
FLOW_CTRL_CPU1_CSR + 8,

6
arch/arm/mach-tegra/tegra30_clocks_data.c
View File

@ -1183,7 +1183,7 @@ static struct clk tegra_dsib = {
.num_parents = ARRAY_SIZE(mux_plld_out0_plld2_out0),
};
struct clk *tegra_list_clks[] = {
static struct clk *tegra_list_clks[] = {
&tegra_apbdma,
&tegra_rtc,
&tegra_kbc,
@ -1289,7 +1289,7 @@ struct clk *tegra_list_clks[] = {
* configuration. List those here to register them twice in the clock lookup
* table under two names.
*/
struct clk_duplicate tegra_clk_duplicates[] = {
static struct clk_duplicate tegra_clk_duplicates[] = {
CLK_DUPLICATE("uarta", "serial8250.0", NULL),
CLK_DUPLICATE("uartb", "serial8250.1", NULL),
CLK_DUPLICATE("uartc", "serial8250.2", NULL),
@ -1340,7 +1340,7 @@ struct clk_duplicate tegra_clk_duplicates[] = {
CLK_DUPLICATE("pll_d2_out0", "hdmi", "parent"),
};
struct clk *tegra_ptr_clks[] = {
static struct clk *tegra_ptr_clks[] = {
&tegra_clk_32k,
&tegra_clk_m,
&tegra_clk_m_div2,