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drm/i915/fbc: Enable fbc on i865
Unlike all the other pre-snb desktop platforms i865 actually supports FBC. Let's enable it. Quote from the spec: "DevSDG provides the same Run-Length Encoded Frame Buffer Compression (RLEFBC) function as exists in DevMGM." As i865 only has the one pipe we want to skip massaging the plane<->pipe assignment aimed at getting FBC+LVDS working on the mobile platforms. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200702153723.24327-4-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
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@ -16332,7 +16332,8 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
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* On gen2/3 only plane A can do FBC, but the panel fitter and LVDS
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* port is hooked to pipe B. Hence we want plane A feeding pipe B.
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*/
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if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) < 4)
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if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) < 4 &&
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INTEL_NUM_PIPES(dev_priv) == 2)
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plane->i9xx_plane = (enum i9xx_plane_id) !pipe;
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else
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plane->i9xx_plane = (enum i9xx_plane_id) pipe;
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@ -217,6 +217,7 @@ static const struct intel_device_info i85x_info = {
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static const struct intel_device_info i865g_info = {
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I845_FEATURES,
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PLATFORM(INTEL_I865G),
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.display.has_fbc = 1,
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};
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#define GEN3_FEATURES \
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