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ARM: ixp4xx: Convert to SPARSE_IRQ

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This localizes the <mach/irqs.h> header to the mach-ixp4xx
directory, removes NR_IRQS and switches IXP4xx over to using
SPARSE_IRQ.

This is a prerequisite for DT support.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij 2018-12-29 15:47:52 +01:00
parent 075df31aed
commit dc8ef8cd3a
25 changed files with 47 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/Kconfig
View File

@ -437,6 +437,7 @@ config ARCH_IXP4XX
select GPIOLIB
select HAVE_PCI
select NEED_MACH_IO_H
select SPARSE_IRQ
select USB_EHCI_BIG_ENDIAN_DESC
select USB_EHCI_BIG_ENDIAN_MMIO
help

2
arch/arm/mach-ixp4xx/avila-pci.c
View File

@ -27,6 +27,8 @@
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include "irqs.h"
#define AVILA_MAX_DEV 4
#define LOFT_MAX_DEV 6
#define IRQ_LINES 4

2
arch/arm/mach-ixp4xx/avila-setup.c
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@ -28,6 +28,8 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include "irqs.h"
#define AVILA_SDA_PIN 7
#define AVILA_SCL_PIN 6

2
arch/arm/mach-ixp4xx/common.c
View File

@ -45,6 +45,8 @@
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include "irqs.h"
#define IXP4XX_TIMER_FREQ 66666000
/*

2
arch/arm/mach-ixp4xx/coyote-pci.c
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@ -23,6 +23,8 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include "irqs.h"
#define SLOT0_DEVID 14
#define SLOT1_DEVID 15

2
arch/arm/mach-ixp4xx/coyote-setup.c
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@ -25,6 +25,8 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include "irqs.h"
#define COYOTE_IDE_BASE_PHYS IXP4XX_EXP_BUS_BASE(3)
#define COYOTE_IDE_BASE_VIRT 0xFFFE1000
#define COYOTE_IDE_REGION_SIZE 0x1000

2
arch/arm/mach-ixp4xx/dsmg600-pci.c
View File

@ -22,6 +22,8 @@
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
#include "irqs.h"
#define MAX_DEV 4
#define IRQ_LINES 3

2
arch/arm/mach-ixp4xx/dsmg600-setup.c
View File

@ -35,6 +35,8 @@
#include <asm/mach/flash.h>
#include <asm/mach/time.h>
#include "irqs.h"
#define DSMG600_SDA_PIN 5
#define DSMG600_SCL_PIN 4

2
arch/arm/mach-ixp4xx/fsg-pci.c
View File

@ -22,6 +22,8 @@
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
#include "irqs.h"
#define MAX_DEV 3
#define IRQ_LINES 3

2
arch/arm/mach-ixp4xx/fsg-setup.c
View File

@ -29,6 +29,8 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include "irqs.h"
#define FSG_SDA_PIN 12
#define FSG_SCL_PIN 13

2
arch/arm/mach-ixp4xx/gateway7001-pci.c
View File

@ -27,6 +27,8 @@
#include <asm/mach/pci.h>
#include "irqs.h"
void __init gateway7001_pci_preinit(void)
{
irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);

2
arch/arm/mach-ixp4xx/gateway7001-setup.c
View File

@ -28,6 +28,8 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include "irqs.h"
static struct flash_platform_data gateway7001_flash_data = {
.map_name = "cfi_probe",
.width = 2,

2
arch/arm/mach-ixp4xx/gtwx5715-pci.c
View File

@ -30,6 +30,8 @@
#include <mach/hardware.h>
#include <asm/mach/pci.h>
#include "irqs.h"
#define SLOT0_DEVID 0
#define SLOT1_DEVID 1
#define INTA 10 /* slot 1 has INTA and INTB crossed */

2
arch/arm/mach-ixp4xx/gtwx5715-setup.c
View File

@ -36,6 +36,8 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include "irqs.h"
/* GPIO 5,6,7 and 12 are hard wired to the Kendin KS8995M Switch
and operate as an SPI type interface. The details of the interface
are available on Kendin/Micrel's web site. */

2
arch/arm/mach-ixp4xx/include/mach/irqs.h → arch/arm/mach-ixp4xx/irqs.h
View File

@ -63,8 +63,6 @@
#define _IXP4XX_GPIO_IRQ(n) (IRQ_IXP4XX_GPIO ## n)
#define IXP4XX_GPIO_IRQ(n) _IXP4XX_GPIO_IRQ(n)
#define NR_IRQS 512
#define XSCALE_PMU_IRQ (IRQ_IXP4XX_XSCALE_PMU)
#endif

2
arch/arm/mach-ixp4xx/ixdp425-pci.c
View File

@ -24,6 +24,8 @@
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include "irqs.h"
#define MAX_DEV 4
#define IRQ_LINES 4

2
arch/arm/mach-ixp4xx/ixdp425-setup.c
View File

@ -32,6 +32,8 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include "irqs.h"
#define IXDP425_SDA_PIN 7
#define IXDP425_SCL_PIN 6

2
arch/arm/mach-ixp4xx/ixdpg425-pci.c
View File

@ -23,6 +23,8 @@
#include <asm/mach/pci.h>
#include "irqs.h"
void __init ixdpg425_pci_preinit(void)
{
irq_set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW);

2
arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
View File

@ -14,6 +14,8 @@
#include <linux/module.h>
#include <mach/qmgr.h>
#include "irqs.h"
static struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
static struct resource *mem_res;
static spinlock_t qmgr_lock;

2
arch/arm/mach-ixp4xx/nas100d-pci.c
View File

@ -21,6 +21,8 @@
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
#include "irqs.h"
#define MAX_DEV 3
#define IRQ_LINES 3

2
arch/arm/mach-ixp4xx/nas100d-setup.c
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@ -34,6 +34,8 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include "irqs.h"
#define NAS100D_SDA_PIN 5
#define NAS100D_SCL_PIN 6

2
arch/arm/mach-ixp4xx/nslu2-pci.c
View File

@ -21,6 +21,8 @@
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
#include "irqs.h"
#define MAX_DEV 3
#define IRQ_LINES 3

2
arch/arm/mach-ixp4xx/nslu2-setup.c
View File

@ -32,6 +32,8 @@
#include <asm/mach/flash.h>
#include <asm/mach/time.h>
#include "irqs.h"
#define NSLU2_SDA_PIN 7
#define NSLU2_SCL_PIN 6

2
arch/arm/mach-ixp4xx/wg302v2-pci.c
View File

@ -27,6 +27,8 @@
#include <asm/mach/pci.h>
#include "irqs.h"
void __init wg302v2_pci_preinit(void)
{
irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);

2
arch/arm/mach-ixp4xx/wg302v2-setup.c
View File

@ -29,6 +29,8 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include "irqs.h"
static struct flash_platform_data wg302v2_flash_data = {
.map_name = "cfi_probe",
.width = 2,