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tile PCI RC: add dma_get_required_mask()
The standard kernel function dma_get_required_mask() uses the highest DRAM address to determine if 32-bit or 64-bit DMA addressing is needed. This only works on architectures that have direct mapping between the PA and the PCI address space, i.e. those that don't have I/O TLBs or have I/O TLB but choose to use direct mapping. Neither of these are true for tilegx. Whether to use 64-bit DMA should depend on the PCI device's capability only, not on the amount of DRAM installeds, so we now advertise a 64-bit DMA mask unconditionally. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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@ -20,6 +20,10 @@
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#include <linux/cache.h>
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#include <linux/io.h>
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#ifdef __tilegx__
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#define ARCH_HAS_DMA_GET_REQUIRED_MASK
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#endif
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extern struct dma_map_ops *tile_dma_map_ops;
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extern struct dma_map_ops *gx_pci_dma_map_ops;
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extern struct dma_map_ops *gx_legacy_pci_dma_map_ops;
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@ -607,3 +607,21 @@ int dma_set_coherent_mask(struct device *dev, u64 mask)
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}
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EXPORT_SYMBOL(dma_set_coherent_mask);
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#endif
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#ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
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/*
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* The generic dma_get_required_mask() uses the highest physical address
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* (max_pfn) to provide the hint to the PCI drivers regarding 32-bit or
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* 64-bit DMA configuration. Since TILEGx has I/O TLB/MMU, allowing the
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* DMAs to use the full 64-bit PCI address space and not limited by
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* the physical memory space, we always let the PCI devices use
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* 64-bit DMA if they have that capability, by returning the 64-bit
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* DMA mask here. The device driver has the option to use 32-bit DMA if
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* the device is not capable of 64-bit DMA.
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*/
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u64 dma_get_required_mask(struct device *dev)
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{
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return DMA_BIT_MASK(64);
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}
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EXPORT_SYMBOL_GPL(dma_get_required_mask);
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#endif
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