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SoCFPGA updates for v4.2 part 3
- Add SCU node for Arria 10 - Add enable-method for cpu nodes - Add SDRAM controller binding doc - Enable gpio-leds on SoCFPGA Socrates board -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVbmTMAAoJEBmUBAuBoyj0iUsP/11m4hJBD2PT11MeXZZy4uWy ZzBGobhAWCcMKE/c00W+UpDZ18fXDs9oK3obAFOyDCvJgXAq0RTVZ6Vj5sdFqMHM inEnbHVQdYMwd0/WqBVoyNAluQMpSa3yg9YtcBCIzZCxX3DRWk18QAQycHczbxzp qM1Z8bXPSPBi5CCX0w68oxnOh+vN6dcz/CTXqMPpU+3Oo1b1h4yZXvLTp4rAboSn dr0OnnlD4LlAH0FhJkbVmrU++jeOaUZu491tUSm6EijK+a0ATNwHOn00OMdZYvrb AXvUXcjWwezaPx6b+XOAwYS2WFCSTWRcxUo+lmLB2UpzeHNAZp+V6hAtigVEq8au 03619HXcbWfW2c2d+wDQ01xHA3t30rpWaVMWyf+UGMVoCKgDXYaNh3h5bwYIoUia hSqYACO/f3PkGlJrndGRuRMPaJKNE2ihaoJbHtzIBI5rcRnZ2RtRkdg6j6HWBdr4 Um8Hsi+CJDtXBo4OoVYl8jqCp2Qh7Zq1bKQ99HYFDinQtxYr+Q4G5PsBc/UHDwC0 0PBJUyneWeJlemKoewR6RRtx0d9IkA02T1ijaaOVjtYp9pU7JDMdkMtHbSgqnnNd bFWU49HHDzF92sOEu0wRT5SOlFp3VO2hs/jGWWDlWXrA1iJujuHFofuTEfFrlwLJ n5aKtM8w1JJfzWQ06/zz =nAUL -----END PGP SIGNATURE----- Merge tag 'socfpga_dts_for_v4.2_part_3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt SoCFPGA updates for v4.2 part 3 - Add SCU node for Arria 10 - Add enable-method for cpu nodes - Add SDRAM controller binding doc - Enable gpio-leds on SoCFPGA Socrates board * tag 'socfpga_dts_for_v4.2_part_3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: socfpga: socrates: add gpio-leds ARM: socfpga: socrates: enable gpio0/1 ARM: socfpga: dts: add sdram controller dt binding doc ARM: socfpga: dts: add enable-method property for cpu nodes ARM: socfpga: dts: add the a9-scu node for arria10
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commit
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@ -0,0 +1,12 @@
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Altera SOCFPGA SDRAM Controller
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Required properties:
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- compatible : Should contain "altr,sdr-ctl" and "syscon".
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syscon is required by the Altera SOCFPGA SDRAM EDAC.
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- reg : Should contain 1 register range (address and length)
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Example:
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sdr: sdr@ffc25000 {
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compatible = "altr,sdr-ctl", "syscon";
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reg = <0xffc25000 0x1000>;
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};
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@ -36,6 +36,7 @@
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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enable-method = "altr,socfpga-smp";
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cpu@0 {
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compatible = "arm,cortex-a9";
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@ -24,6 +24,7 @@
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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enable-method = "altr,socfpga-a10-smp";
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cpu@0 {
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compatible = "arm,cortex-a9";
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@ -567,6 +568,11 @@
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reg = <0xffd05000 0x100>;
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};
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scu: snoop-control-unit@ffffc000 {
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compatible = "arm,cortex-a9-scu";
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reg = <0xffffc000 0x100>;
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};
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sysmgr: sysmgr@ffd06000 {
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compatible = "altr,sys-mgr", "syscon";
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reg = <0xffd06000 0x300>;
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@ -30,12 +30,23 @@
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device_type = "memory";
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reg = <0x0 0x40000000>; /* 1GB */
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};
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leds: gpio-leds {
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};
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};
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&gmac1 {
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status = "okay";
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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@ -45,6 +56,26 @@
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};
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};
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&leds {
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compatible = "gpio-leds";
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led@0 {
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label = "led:green:heartbeat";
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gpios = <&porta 28 1>;
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linux,default-trigger = "heartbeat";
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};
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led@1 {
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label = "led:green:D7";
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gpios = <&portb 19 1>;
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};
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led@2 {
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label = "led:green:D8";
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gpios = <&portb 25 1>;
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};
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};
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&mmc {
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status = "okay";
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};
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