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crypto: marvell/cesa - use presence of scatterlist to determine data load
Use the presence of the scatterlist to determine whether we should load any new user data to the engine. The following shall always be true at this point: iter.base.op_len == 0 === iter.src.sg In doing so, we can: 1. eliminate the test for iter.base.op_len inside the loop, which makes the loop operation more obvious and understandable. 2. move the operation generation for the cache-only case. This prepares the code for the next step in its transformation, and also uncovers a bug that will be fixed in the next patch. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -627,7 +627,27 @@ static int mv_cesa_ahash_dma_req_init(struct ahash_request *req)
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if (ret)
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goto err_free_tdma;
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if (creq->cache_ptr && !iter.base.op_len) {
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if (iter.src.sg) {
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/*
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* Add all the new data, inserting an operation block and
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* launch command between each full SRAM block-worth of
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* data.
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*/
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do {
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ret = mv_cesa_dma_add_op_transfers(&chain, &iter.base,
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&iter.src, flags);
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if (ret)
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goto err_free_tdma;
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op = mv_cesa_dma_add_frag(&chain, &creq->op_tmpl,
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iter.base.op_len, flags);
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if (IS_ERR(op)) {
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ret = PTR_ERR(op);
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goto err_free_tdma;
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}
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} while (mv_cesa_ahash_req_iter_next_op(&iter));
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} else if (creq->cache_ptr) {
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/* Account for the data that was in the cache. */
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op = mv_cesa_dma_add_frag(&chain, &creq->op_tmpl,
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creq->cache_ptr, flags);
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if (IS_ERR(op)) {
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@ -636,23 +656,6 @@ static int mv_cesa_ahash_dma_req_init(struct ahash_request *req)
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}
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}
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do {
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if (!iter.base.op_len)
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break;
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ret = mv_cesa_dma_add_op_transfers(&chain, &iter.base,
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&iter.src, flags);
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if (ret)
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goto err_free_tdma;
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op = mv_cesa_dma_add_frag(&chain, &creq->op_tmpl,
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iter.base.op_len, flags);
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if (IS_ERR(op)) {
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ret = PTR_ERR(op);
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goto err_free_tdma;
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}
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} while (mv_cesa_ahash_req_iter_next_op(&iter));
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op = mv_cesa_ahash_dma_last_req(&chain, &iter, creq, op, flags);
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if (IS_ERR(op)) {
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ret = PTR_ERR(op);
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