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ASoC: Intel: Add Skylake HDA audio driver
This patch follows up by adding the HDA controller operations. This code is mostly derived from Intel HDA PCI driver without legacy bits Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jeeja KP
Mark Brown
parent
a40e693c7f
commit
d8c2dab838
525
sound/soc/intel/skylake/skl.c
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525
sound/soc/intel/skylake/skl.c
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@ -0,0 +1,525 @@
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/*
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* skl.c - Implementation of ASoC Intel SKL HD Audio driver
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*
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* Copyright (C) 2014-2015 Intel Corp
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* Author: Jeeja KP <jeeja.kp@intel.com>
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*
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* Derived mostly from Intel HDA driver with following copyrights:
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* Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
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* PeiSen Hou <pshou@realtek.com.tw>
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/pm_runtime.h>
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#include <linux/platform_device.h>
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#include <sound/pcm.h>
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#include "skl.h"
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/*
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* initialize the PCI registers
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*/
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static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg,
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unsigned char mask, unsigned char val)
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{
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unsigned char data;
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pci_read_config_byte(pci, reg, &data);
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data &= ~mask;
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data |= (val & mask);
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pci_write_config_byte(pci, reg, data);
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}
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static void skl_init_pci(struct skl *skl)
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{
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struct hdac_ext_bus *ebus = &skl->ebus;
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/*
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* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
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* TCSEL == Traffic Class Select Register, which sets PCI express QOS
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* Ensuring these bits are 0 clears playback static on some HD Audio
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* codecs.
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* The PCI register TCSEL is defined in the Intel manuals.
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*/
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dev_dbg(ebus_to_hbus(ebus)->dev, "Clearing TCSEL\n");
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skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0);
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}
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/* called from IRQ */
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static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr)
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{
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snd_pcm_period_elapsed(hstr->substream);
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}
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static irqreturn_t skl_interrupt(int irq, void *dev_id)
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{
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struct hdac_ext_bus *ebus = dev_id;
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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u32 status;
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if (!pm_runtime_active(bus->dev))
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return IRQ_NONE;
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spin_lock(&bus->reg_lock);
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status = snd_hdac_chip_readl(bus, INTSTS);
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if (status == 0 || status == 0xffffffff) {
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spin_unlock(&bus->reg_lock);
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return IRQ_NONE;
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}
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/* clear rirb int */
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status = snd_hdac_chip_readb(bus, RIRBSTS);
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if (status & RIRB_INT_MASK) {
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if (status & RIRB_INT_RESPONSE)
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snd_hdac_bus_update_rirb(bus);
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snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
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}
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spin_unlock(&bus->reg_lock);
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return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED;
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}
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static irqreturn_t skl_threaded_handler(int irq, void *dev_id)
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{
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struct hdac_ext_bus *ebus = dev_id;
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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u32 status;
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status = snd_hdac_chip_readl(bus, INTSTS);
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snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update);
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return IRQ_HANDLED;
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}
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static int skl_acquire_irq(struct hdac_ext_bus *ebus, int do_disconnect)
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{
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struct skl *skl = ebus_to_skl(ebus);
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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int ret;
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ret = request_threaded_irq(skl->pci->irq, skl_interrupt,
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skl_threaded_handler,
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IRQF_SHARED,
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KBUILD_MODNAME, ebus);
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if (ret) {
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dev_err(bus->dev,
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"unable to grab IRQ %d, disabling device\n",
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skl->pci->irq);
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return ret;
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}
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bus->irq = skl->pci->irq;
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pci_intx(skl->pci, 1);
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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/*
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* power management
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*/
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static int skl_suspend(struct device *dev)
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{
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struct pci_dev *pci = to_pci_dev(dev);
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struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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snd_hdac_bus_stop_chip(bus);
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snd_hdac_bus_enter_link_reset(bus);
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return 0;
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}
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static int skl_resume(struct device *dev)
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{
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struct pci_dev *pci = to_pci_dev(dev);
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struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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struct skl *hda = ebus_to_skl(ebus);
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skl_init_pci(hda);
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snd_hdac_bus_init_chip(bus, 1);
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return 0;
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}
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#endif /* CONFIG_PM_SLEEP */
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#ifdef CONFIG_PM
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static int skl_runtime_suspend(struct device *dev)
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{
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struct pci_dev *pci = to_pci_dev(dev);
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struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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dev_dbg(bus->dev, "in %s\n", __func__);
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/* enable controller wake up event */
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snd_hdac_chip_updatew(bus, WAKEEN, 0, STATESTS_INT_MASK);
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snd_hdac_bus_stop_chip(bus);
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snd_hdac_bus_enter_link_reset(bus);
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return 0;
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}
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static int skl_runtime_resume(struct device *dev)
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{
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struct pci_dev *pci = to_pci_dev(dev);
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struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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struct skl *hda = ebus_to_skl(ebus);
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int status;
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dev_dbg(bus->dev, "in %s\n", __func__);
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/* Read STATESTS before controller reset */
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status = snd_hdac_chip_readw(bus, STATESTS);
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skl_init_pci(hda);
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snd_hdac_bus_init_chip(bus, true);
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/* disable controller Wake Up event */
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snd_hdac_chip_updatew(bus, WAKEEN, STATESTS_INT_MASK, 0);
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return 0;
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}
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#endif /* CONFIG_PM */
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static const struct dev_pm_ops skl_pm = {
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SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume)
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SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL)
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};
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/*
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* destructor
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*/
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static int skl_free(struct hdac_ext_bus *ebus)
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{
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struct skl *skl = ebus_to_skl(ebus);
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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skl->init_failed = 1; /* to be sure */
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snd_hdac_ext_stop_streams(ebus);
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if (bus->irq >= 0)
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free_irq(bus->irq, (void *)bus);
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if (bus->remap_addr)
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iounmap(bus->remap_addr);
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snd_hdac_bus_free_stream_pages(bus);
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snd_hdac_stream_free_all(ebus);
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snd_hdac_link_free_all(ebus);
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pci_release_regions(skl->pci);
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pci_disable_device(skl->pci);
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snd_hdac_ext_bus_exit(ebus);
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return 0;
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}
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static int skl_dmic_device_register(struct skl *skl)
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{
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struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
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struct platform_device *pdev;
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int ret;
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/* SKL has one dmic port, so allocate dmic device for this */
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pdev = platform_device_alloc("dmic-codec", -1);
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if (!pdev) {
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dev_err(bus->dev, "failed to allocate dmic device\n");
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return -ENOMEM;
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}
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ret = platform_device_add(pdev);
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if (ret) {
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dev_err(bus->dev, "failed to add dmic device: %d\n", ret);
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platform_device_put(pdev);
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return ret;
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}
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skl->dmic_dev = pdev;
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return 0;
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}
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static void skl_dmic_device_unregister(struct skl *skl)
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{
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if (skl->dmic_dev)
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platform_device_unregister(skl->dmic_dev);
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}
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/*
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* Probe the given codec address
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*/
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static int probe_codec(struct hdac_ext_bus *ebus, int addr)
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{
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
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(AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
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unsigned int res;
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mutex_lock(&bus->cmd_mutex);
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snd_hdac_bus_send_cmd(bus, cmd);
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snd_hdac_bus_get_response(bus, addr, &res);
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mutex_unlock(&bus->cmd_mutex);
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if (res == -1)
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return -EIO;
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dev_dbg(bus->dev, "codec #%d probed OK\n", addr);
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return snd_hdac_ext_bus_device_init(ebus, addr);
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}
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/* Codec initialization */
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static int skl_codec_create(struct hdac_ext_bus *ebus)
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{
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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int c, max_slots;
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max_slots = HDA_MAX_CODECS;
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/* First try to probe all given codec slots */
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for (c = 0; c < max_slots; c++) {
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if ((bus->codec_mask & (1 << c))) {
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if (probe_codec(ebus, c) < 0) {
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/*
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* Some BIOSen give you wrong codec addresses
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* that don't exist
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*/
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dev_warn(bus->dev,
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"Codec #%d probe error; disabling it...\n", c);
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bus->codec_mask &= ~(1 << c);
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/*
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* More badly, accessing to a non-existing
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* codec often screws up the controller bus,
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* and disturbs the further communications.
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* Thus if an error occurs during probing,
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* better to reset the controller bus to get
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* back to the sanity state.
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*/
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snd_hdac_bus_stop_chip(bus);
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snd_hdac_bus_init_chip(bus, true);
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}
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}
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}
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return 0;
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}
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static const struct hdac_bus_ops bus_core_ops = {
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.command = snd_hdac_bus_send_cmd,
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.get_response = snd_hdac_bus_get_response,
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};
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/*
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* constructor
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*/
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static int skl_create(struct pci_dev *pci,
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const struct hdac_io_ops *io_ops,
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struct skl **rskl)
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{
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struct skl *skl;
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struct hdac_ext_bus *ebus;
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int err;
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*rskl = NULL;
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err = pci_enable_device(pci);
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if (err < 0)
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return err;
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skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL);
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if (!skl) {
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pci_disable_device(pci);
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return -ENOMEM;
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}
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ebus = &skl->ebus;
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snd_hdac_ext_bus_init(ebus, &pci->dev, &bus_core_ops, io_ops);
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ebus->bus.use_posbuf = 1;
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skl->pci = pci;
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ebus->bus.bdl_pos_adj = 0;
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*rskl = skl;
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return 0;
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}
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static int skl_first_init(struct hdac_ext_bus *ebus)
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{
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struct skl *skl = ebus_to_skl(ebus);
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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struct pci_dev *pci = skl->pci;
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int err;
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unsigned short gcap;
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int cp_streams, pb_streams, start_idx;
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err = pci_request_regions(pci, "Skylake HD audio");
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if (err < 0)
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return err;
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bus->addr = pci_resource_start(pci, 0);
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bus->remap_addr = pci_ioremap_bar(pci, 0);
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if (bus->remap_addr == NULL) {
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dev_err(bus->dev, "ioremap error\n");
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return -ENXIO;
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}
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if (skl_acquire_irq(ebus, 0) < 0)
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return -EBUSY;
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pci_set_master(pci);
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synchronize_irq(bus->irq);
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gcap = snd_hdac_chip_readw(bus, GCAP);
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dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap);
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/* allow 64bit DMA address if supported by H/W */
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if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) {
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dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64));
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} else {
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dma_set_mask(bus->dev, DMA_BIT_MASK(32));
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dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32));
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}
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/* read number of streams from GCAP register */
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cp_streams = (gcap >> 8) & 0x0f;
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pb_streams = (gcap >> 12) & 0x0f;
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if (!pb_streams && !cp_streams)
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return -EIO;
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ebus->num_streams = cp_streams + pb_streams;
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/* initialize streams */
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snd_hdac_ext_stream_init_all
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(ebus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
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start_idx = cp_streams;
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snd_hdac_ext_stream_init_all
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(ebus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
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err = snd_hdac_bus_alloc_stream_pages(bus);
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if (err < 0)
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return err;
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/* initialize chip */
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skl_init_pci(skl);
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snd_hdac_bus_init_chip(bus, true);
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/* codec detection */
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if (!bus->codec_mask) {
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dev_err(bus->dev, "no codecs found!\n");
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return -ENODEV;
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}
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return 0;
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}
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static int skl_probe(struct pci_dev *pci,
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const struct pci_device_id *pci_id)
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{
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struct skl *skl;
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struct hdac_ext_bus *ebus = NULL;
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struct hdac_bus *bus = NULL;
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int err;
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/* we use ext core ops, so provide NULL for ops here */
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err = skl_create(pci, NULL, &skl);
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if (err < 0)
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return err;
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ebus = &skl->ebus;
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bus = ebus_to_hbus(ebus);
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err = skl_first_init(ebus);
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if (err < 0)
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goto out_free;
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pci_set_drvdata(skl->pci, ebus);
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/* create device for soc dmic */
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err = skl_dmic_device_register(skl);
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if (err < 0)
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goto out_free;
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/* register platform dai and controls */
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err = skl_platform_register(bus->dev);
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if (err < 0)
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goto out_dmic_free;
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/* create codec instances */
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err = skl_codec_create(ebus);
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if (err < 0)
|
||||
goto out_unregister;
|
||||
|
||||
/*configure PM */
|
||||
pm_runtime_set_autosuspend_delay(bus->dev, SKL_SUSPEND_DELAY);
|
||||
pm_runtime_use_autosuspend(bus->dev);
|
||||
pm_runtime_put_noidle(bus->dev);
|
||||
pm_runtime_allow(bus->dev);
|
||||
|
||||
return 0;
|
||||
|
||||
out_unregister:
|
||||
skl_platform_unregister(bus->dev);
|
||||
out_dmic_free:
|
||||
skl_dmic_device_unregister(skl);
|
||||
out_free:
|
||||
skl->init_failed = 1;
|
||||
skl_free(ebus);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static void skl_remove(struct pci_dev *pci)
|
||||
{
|
||||
struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
|
||||
struct skl *skl = ebus_to_skl(ebus);
|
||||
|
||||
if (pci_dev_run_wake(pci))
|
||||
pm_runtime_get_noresume(&pci->dev);
|
||||
pci_dev_put(pci);
|
||||
skl_platform_unregister(&pci->dev);
|
||||
skl_dmic_device_unregister(skl);
|
||||
skl_free(ebus);
|
||||
dev_set_drvdata(&pci->dev, NULL);
|
||||
}
|
||||
|
||||
/* PCI IDs */
|
||||
static const struct pci_device_id skl_ids[] = {
|
||||
/* Sunrise Point-LP */
|
||||
{ PCI_DEVICE(0x8086, 0x9d70), 0},
|
||||
{ 0, }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(pci, skl_ids);
|
||||
|
||||
/* pci_driver definition */
|
||||
static struct pci_driver skl_driver = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = skl_ids,
|
||||
.probe = skl_probe,
|
||||
.remove = skl_remove,
|
||||
.driver = {
|
||||
.pm = &skl_pm,
|
||||
},
|
||||
};
|
||||
module_pci_driver(skl_driver);
|
||||
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");
|
||||
Loading…
Reference in New Issue
Block a user