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ARM: dts: mvebu: Add CRS328-4C-20S-4S board

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MikroTik CRS328-4C-20S-4S board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.

This commit includes two board variants, namely the factory
default one and a Bit variant. The Bit variant has a
bigger Macronix flash.

This device tree includes basic Linux support.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Luka Kovacic 2020-07-24 12:38:39 +02:00 committed by Gregory CLEMENT
parent 1b7b86f68c
commit d7c51bfa86
4 changed files with 166 additions and 0 deletions
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2
arch/arm/boot/dts/Makefile
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@ -1344,6 +1344,8 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-crs305-1g-4s-bit.dtb \
armada-xp-crs326-24g-2s.dtb \
armada-xp-crs326-24g-2s-bit.dtb \
armada-xp-crs328-4c-20s-4s.dtb \
armada-xp-crs328-4c-20s-4s-bit.dtb \
armada-xp-db.dtb \
armada-xp-db-dxbc2.dtb \
armada-xp-db-xc3-24g4xg.dtb \

43
arch/arm/boot/dts/armada-xp-crs328-4c-20s-4s-bit.dts Normal file
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@ -0,0 +1,43 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for MikroTik CRS328-4C-20S-4S+ Bit board
*
* Copyright (C) 2020 Sartura Ltd.
* Author: Luka Kovacic <luka.kovacic@sartura.hr>
*/
#include "armada-xp-crs328-4c-20s-4s.dtsi"
/ {
model = "MikroTik CRS328-4C-20S-4S+ Bit";
};
&spi0 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
m25p,fast-read;
partition@u-boot {
reg = <0x00000000 0x001f0000>;
label = "u-boot";
};
partition@u-boot-env {
reg = <0x001f0000 0x00010000>;
label = "u-boot-env";
};
partition@ubi1 {
reg = <0x00200000 0x03f00000>;
label = "ubi1";
};
partition@ubi2 {
reg = <0x04100000 0x03f00000>;
label = "ubi2";
};
};
};

17
arch/arm/boot/dts/armada-xp-crs328-4c-20s-4s.dts Normal file
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@ -0,0 +1,17 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for MikroTik CRS328-4C-20S-4S+ board
*
* Copyright (C) 2020 Sartura Ltd.
* Author: Luka Kovacic <luka.kovacic@sartura.hr>
*/
#include "armada-xp-crs328-4c-20s-4s.dtsi"
/ {
model = "MikroTik CRS328-4C-20S-4S+";
};
&spi0 {
status = "okay";
};

104
arch/arm/boot/dts/armada-xp-crs328-4c-20s-4s.dtsi Normal file
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@ -0,0 +1,104 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for CRS328-4C-20S-4S+ board
*
* Copyright (C) 2016 Allied Telesis Labs
* Copyright (C) 2020 Sartura Ltd.
*
* Based on armada-xp-db.dts
*
* Note: this Device Tree assumes that the bootloader has remapped the
* internal registers to 0xf1000000 (instead of the default
* 0xd0000000). The 0xf1000000 is the default used by the recent,
* DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
* boards were delivered with an older version of the bootloader that
* left internal registers mapped at 0xd0000000. If you are in this
* situation, you should either update your bootloader (preferred
* solution) or the below Device Tree should be adjusted.
*/
/dts-v1/;
#include "armada-xp-98dx3236.dtsi"
/ {
model = "CRS328-4C-20S-4S+";
compatible = "mikrotik,crs328-4c-20s-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
};
memory {
device_type = "memory";
reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
};
};
&L2 {
arm,parity-enable;
marvell,ecc-enable;
};
&devbus_bootcs {
status = "okay";
/* Device Bus parameters are required */
/* Read parameters */
devbus,bus-width = <16>;
devbus,turn-off-ps = <60000>;
devbus,badr-skew-ps = <0>;
devbus,acc-first-ps = <124000>;
devbus,acc-next-ps = <248000>;
devbus,rd-setup-ps = <0>;
devbus,rd-hold-ps = <0>;
/* Write parameters */
devbus,sync-enable = <0>;
devbus,wr-high-ps = <60000>;
devbus,wr-low-ps = <60000>;
devbus,ale-wr-ps = <60000>;
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&i2c0 {
clock-frequency = <100000>;
status = "okay";
};
&usb0 {
status = "okay";
};
&spi0 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
m25p,fast-read;
partition@u-boot {
reg = <0x00000000 0x001f0000>;
label = "u-boot";
};
partition@u-boot-env {
reg = <0x001f0000 0x00010000>;
label = "u-boot-env";
};
partition@ubi1 {
reg = <0x00200000 0x00e00000>;
label = "ubi1";
};
};
};