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spi: sirf: fix line over 80 characters style issue
fix a lot of "line over 80 characters" checkpatch issues, on which the users of the driver, key customers care about this very much. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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6ee8a2f7d5
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d77ec5df47
@ -382,14 +382,16 @@ static int spi_sirfsoc_transfer(struct spi_device *spi, struct spi_transfer *t)
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if (IS_DMA_VALID(t)) {
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struct dma_async_tx_descriptor *rx_desc, *tx_desc;
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sspi->dst_start = dma_map_single(&spi->dev, sspi->rx, t->len, DMA_FROM_DEVICE);
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sspi->dst_start = dma_map_single(&spi->dev,
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sspi->rx, t->len, DMA_FROM_DEVICE);
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rx_desc = dmaengine_prep_slave_single(sspi->rx_chan,
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sspi->dst_start, t->len, DMA_DEV_TO_MEM,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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rx_desc->callback = spi_sirfsoc_dma_fini_callback;
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rx_desc->callback_param = &sspi->rx_done;
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sspi->src_start = dma_map_single(&spi->dev, (void *)sspi->tx, t->len, DMA_TO_DEVICE);
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sspi->src_start = dma_map_single(&spi->dev,
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(void *)sspi->tx, t->len, DMA_TO_DEVICE);
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tx_desc = dmaengine_prep_slave_single(sspi->tx_chan,
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sspi->src_start, t->len, DMA_MEM_TO_DEV,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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@ -404,13 +406,18 @@ static int spi_sirfsoc_transfer(struct spi_device *spi, struct spi_transfer *t)
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/* Send the first word to trigger the whole tx/rx process */
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sspi->tx_word(sspi);
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writel(SIRFSOC_SPI_RX_OFLOW_INT_EN | SIRFSOC_SPI_TX_UFLOW_INT_EN |
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SIRFSOC_SPI_RXFIFO_THD_INT_EN | SIRFSOC_SPI_TXFIFO_THD_INT_EN |
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SIRFSOC_SPI_FRM_END_INT_EN | SIRFSOC_SPI_RXFIFO_FULL_INT_EN |
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SIRFSOC_SPI_TXFIFO_EMPTY_INT_EN, sspi->base + SIRFSOC_SPI_INT_EN);
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writel(SIRFSOC_SPI_RX_OFLOW_INT_EN |
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SIRFSOC_SPI_TX_UFLOW_INT_EN |
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SIRFSOC_SPI_RXFIFO_THD_INT_EN |
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SIRFSOC_SPI_TXFIFO_THD_INT_EN |
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SIRFSOC_SPI_FRM_END_INT_EN |
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SIRFSOC_SPI_RXFIFO_FULL_INT_EN |
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SIRFSOC_SPI_TXFIFO_EMPTY_INT_EN,
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sspi->base + SIRFSOC_SPI_INT_EN);
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}
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writel(SIRFSOC_SPI_RX_EN | SIRFSOC_SPI_TX_EN, sspi->base + SIRFSOC_SPI_TX_RX_EN);
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writel(SIRFSOC_SPI_RX_EN | SIRFSOC_SPI_TX_EN,
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sspi->base + SIRFSOC_SPI_TX_RX_EN);
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if (!IS_DMA_VALID(t)) { /* for PIO */
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if (wait_for_completion_timeout(&sspi->rx_done, timeout) == 0)
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@ -434,8 +441,10 @@ static int spi_sirfsoc_transfer(struct spi_device *spi, struct spi_transfer *t)
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}
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if (IS_DMA_VALID(t)) {
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dma_unmap_single(&spi->dev, sspi->src_start, t->len, DMA_TO_DEVICE);
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dma_unmap_single(&spi->dev, sspi->dst_start, t->len, DMA_FROM_DEVICE);
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dma_unmap_single(&spi->dev,
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sspi->src_start, t->len, DMA_TO_DEVICE);
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dma_unmap_single(&spi->dev,
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sspi->dst_start, t->len, DMA_FROM_DEVICE);
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}
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/* TX, RX FIFO stop */
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@ -512,7 +521,8 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
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break;
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case 12:
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case 16:
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regval |= (bits_per_word == 12) ? SIRFSOC_SPI_TRAN_DAT_FORMAT_12 :
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regval |= (bits_per_word == 12) ?
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SIRFSOC_SPI_TRAN_DAT_FORMAT_12 :
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SIRFSOC_SPI_TRAN_DAT_FORMAT_16;
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sspi->rx_word = spi_sirfsoc_rx_word_u16;
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sspi->tx_word = spi_sirfsoc_tx_word_u16;
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@ -540,8 +550,8 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
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regval |= SIRFSOC_SPI_CLK_IDLE_STAT;
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/*
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* Data should be driven at least 1/2 cycle before the fetch edge to make
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* sure that data gets stable at the fetch edge.
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* Data should be driven at least 1/2 cycle before the fetch edge
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* to make sure that data gets stable at the fetch edge.
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*/
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if (((spi->mode & SPI_CPOL) && (spi->mode & SPI_CPHA)) ||
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(!(spi->mode & SPI_CPOL) && !(spi->mode & SPI_CPHA)))
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@ -578,11 +588,14 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
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if (IS_DMA_VALID(t)) {
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/* Enable DMA mode for RX, TX */
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writel(0, sspi->base + SIRFSOC_SPI_TX_DMA_IO_CTRL);
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writel(SIRFSOC_SPI_RX_DMA_FLUSH, sspi->base + SIRFSOC_SPI_RX_DMA_IO_CTRL);
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writel(SIRFSOC_SPI_RX_DMA_FLUSH,
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sspi->base + SIRFSOC_SPI_RX_DMA_IO_CTRL);
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} else {
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/* Enable IO mode for RX, TX */
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writel(SIRFSOC_SPI_IO_MODE_SEL, sspi->base + SIRFSOC_SPI_TX_DMA_IO_CTRL);
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writel(SIRFSOC_SPI_IO_MODE_SEL, sspi->base + SIRFSOC_SPI_RX_DMA_IO_CTRL);
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writel(SIRFSOC_SPI_IO_MODE_SEL,
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sspi->base + SIRFSOC_SPI_TX_DMA_IO_CTRL);
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writel(SIRFSOC_SPI_IO_MODE_SEL,
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sspi->base + SIRFSOC_SPI_RX_DMA_IO_CTRL);
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}
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return 0;
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@ -612,7 +625,8 @@ static int spi_sirfsoc_probe(struct platform_device *pdev)
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goto err_cs;
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}
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master = spi_alloc_master(&pdev->dev, sizeof(*sspi) + sizeof(int) * num_cs);
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master = spi_alloc_master(&pdev->dev,
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sizeof(*sspi) + sizeof(int) * num_cs);
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if (!master) {
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dev_err(&pdev->dev, "Unable to allocate SPI master\n");
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return -ENOMEM;
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@ -808,8 +822,7 @@ static struct platform_driver spi_sirfsoc_driver = {
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.remove = spi_sirfsoc_remove,
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};
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module_platform_driver(spi_sirfsoc_driver);
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MODULE_DESCRIPTION("SiRF SoC SPI master driver");
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MODULE_AUTHOR("Zhiwu Song <Zhiwu.Song@csr.com>, "
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"Barry Song <Baohua.Song@csr.com>");
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MODULE_AUTHOR("Zhiwu Song <Zhiwu.Song@csr.com>");
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MODULE_AUTHOR("Barry Song <Baohua.Song@csr.com>");
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MODULE_LICENSE("GPL v2");
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