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ARM: S5P64X0: Add I2S clkdev support
I2S controller has an internal mux for RCLK source clk. The list of source clk names were passed through platform data in non-dt case. Register the existing RCLK source clocks with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Acked-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -242,12 +242,6 @@ static struct clk init_clocks_off[] = {
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.parent = &clk_pclk_low.clk,
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.enable = s5p64x0_pclk_ctrl,
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.ctrlbit = (1 << 25),
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}, {
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.name = "iis",
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.devname = "samsung-i2s.0",
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.parent = &clk_pclk_low.clk,
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.enable = s5p64x0_pclk_ctrl,
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.ctrlbit = (1 << 26),
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}, {
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.name = "dsim",
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.parent = &clk_pclk_low.clk,
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@ -405,15 +399,6 @@ static struct clksrc_clk clksrcs[] = {
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.sources = &clkset_group1,
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.reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 },
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.reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 },
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}, {
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.clk = {
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.name = "sclk_audio2",
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.ctrlbit = (1 << 11),
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.enable = s5p64x0_sclk_ctrl,
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},
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.sources = &clkset_audio,
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.reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
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.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
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},
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};
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@ -464,6 +449,26 @@ static struct clksrc_clk clk_sclk_uclk = {
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.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
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};
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static struct clk clk_i2s0 = {
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.name = "iis",
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.devname = "samsung-i2s.0",
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.parent = &clk_pclk_low.clk,
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.enable = s5p64x0_pclk_ctrl,
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.ctrlbit = (1 << 26),
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};
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static struct clksrc_clk clk_audio_bus2 = {
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.clk = {
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.name = "sclk_audio2",
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.devname = "samsung-i2s.0",
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.ctrlbit = (1 << 11),
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.enable = s5p64x0_sclk_ctrl,
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},
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.sources = &clkset_audio,
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.reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
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.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
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};
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static struct clksrc_clk clk_sclk_spi0 = {
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.clk = {
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.name = "sclk_spi",
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@ -506,13 +511,18 @@ static struct clk dummy_apb_pclk = {
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.id = -1,
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};
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static struct clk *clk_cdev[] = {
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&clk_i2s0,
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};
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static struct clksrc_clk *clksrc_cdev[] = {
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&clk_sclk_uclk,
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&clk_sclk_spi0,
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&clk_sclk_spi1,
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&clk_sclk_mmc0,
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&clk_sclk_mmc1,
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&clk_sclk_mmc2
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&clk_sclk_mmc2,
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&clk_audio_bus2,
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};
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static struct clk_lookup s5p6440_clk_lookup[] = {
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@ -524,6 +534,8 @@ static struct clk_lookup s5p6440_clk_lookup[] = {
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CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
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CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
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CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
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CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
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CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus2.clk),
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};
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void __init_or_cpufreq s5p6440_setup_clocks(void)
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@ -596,12 +608,17 @@ static struct clk *clks[] __initdata = {
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void __init s5p6440_register_clocks(void)
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{
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int ptr;
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unsigned int cnt;
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s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
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for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
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s3c_register_clksrc(sysclks[ptr], 1);
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s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
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for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
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s3c_disable_clocks(clk_cdev[cnt], 1);
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s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
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s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
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for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
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@ -246,24 +246,6 @@ static struct clk init_clocks_off[] = {
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.parent = &clk_pclk_low.clk,
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.enable = s5p64x0_pclk_ctrl,
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.ctrlbit = (1 << 22),
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}, {
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.name = "iis",
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.devname = "samsung-i2s.0",
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.parent = &clk_pclk_low.clk,
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.enable = s5p64x0_pclk_ctrl,
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.ctrlbit = (1 << 26),
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}, {
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.name = "iis",
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.devname = "samsung-i2s.1",
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.parent = &clk_pclk_low.clk,
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.enable = s5p64x0_pclk_ctrl,
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.ctrlbit = (1 << 15),
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}, {
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.name = "iis",
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.devname = "samsung-i2s.2",
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.parent = &clk_pclk_low.clk,
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.enable = s5p64x0_pclk_ctrl,
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.ctrlbit = (1 << 16),
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}, {
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.name = "i2c",
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.devname = "s3c2440-i2c.1",
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@ -402,6 +384,7 @@ static struct clksrc_sources clkset_sclk_audio0 = {
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static struct clksrc_clk clk_sclk_audio0 = {
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.clk = {
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.name = "audio-bus",
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.devname = "samsung-i2s.0",
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.enable = s5p64x0_sclk_ctrl,
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.ctrlbit = (1 << 8),
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.parent = &clk_dout_epll.clk,
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@ -549,6 +532,36 @@ static struct clksrc_clk clk_sclk_spi1 = {
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.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
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};
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static struct clk clk_i2s0 = {
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.name = "iis",
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.devname = "samsung-i2s.0",
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.parent = &clk_pclk_low.clk,
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.enable = s5p64x0_pclk_ctrl,
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.ctrlbit = (1 << 26),
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};
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static struct clk clk_i2s1 = {
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.name = "iis",
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.devname = "samsung-i2s.1",
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.parent = &clk_pclk_low.clk,
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.enable = s5p64x0_pclk_ctrl,
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.ctrlbit = (1 << 15),
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};
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static struct clk clk_i2s2 = {
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.name = "iis",
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.devname = "samsung-i2s.2",
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.parent = &clk_pclk_low.clk,
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.enable = s5p64x0_pclk_ctrl,
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.ctrlbit = (1 << 16),
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};
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static struct clk *clk_cdev[] = {
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&clk_i2s0,
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&clk_i2s1,
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&clk_i2s2,
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};
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static struct clksrc_clk *clksrc_cdev[] = {
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&clk_sclk_uclk,
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&clk_sclk_spi0,
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@ -556,6 +569,7 @@ static struct clksrc_clk *clksrc_cdev[] = {
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&clk_sclk_mmc0,
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&clk_sclk_mmc1,
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&clk_sclk_mmc2,
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&clk_sclk_audio0,
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};
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static struct clk_lookup s5p6450_clk_lookup[] = {
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@ -567,6 +581,10 @@ static struct clk_lookup s5p6450_clk_lookup[] = {
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CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
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CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
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CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
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CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
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CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_sclk_audio0.clk),
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CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1),
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CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2),
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};
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/* Clock initialization code */
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@ -584,7 +602,6 @@ static struct clksrc_clk *sysclks[] = {
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&clk_pclk,
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&clk_hclk_low,
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&clk_pclk_low,
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&clk_sclk_audio0,
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};
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static struct clk dummy_apb_pclk = {
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@ -661,10 +678,16 @@ void __init_or_cpufreq s5p6450_setup_clocks(void)
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void __init s5p6450_register_clocks(void)
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{
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int ptr;
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unsigned int cnt;
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for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
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s3c_register_clksrc(sysclks[ptr], 1);
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s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
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for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
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s3c_disable_clocks(clk_cdev[cnt], 1);
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s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
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s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
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for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
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@ -19,11 +19,6 @@
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#include <mach/dma.h>
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#include <mach/irqs.h>
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static const char *rclksrc[] = {
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[0] = "iis",
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[1] = "sclk_audio2",
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};
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static int s5p6440_cfg_i2s(struct platform_device *pdev)
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{
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switch (pdev->id) {
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@ -45,7 +40,6 @@ static struct s3c_audio_pdata s5p6440_i2s_pdata = {
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.type = {
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.i2s = {
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.quirks = QUIRK_PRI_6CHAN,
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.src_clk = rclksrc,
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},
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},
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};
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@ -93,7 +87,6 @@ static struct s3c_audio_pdata s5p6450_i2s0_pdata = {
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.type = {
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.i2s = {
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.quirks = QUIRK_PRI_6CHAN,
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.src_clk = rclksrc,
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},
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},
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};
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@ -110,11 +103,6 @@ struct platform_device s5p6450_device_iis0 = {
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static struct s3c_audio_pdata s5p6450_i2s_pdata = {
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.cfg_gpio = s5p6450_cfg_i2s,
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.type = {
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.i2s = {
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.src_clk = rclksrc,
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},
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},
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};
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static struct resource s5p6450_i2s1_resource[] = {
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