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ASoC: max98927: Added max98927_dai_tdm_slot function
Signed-off-by: Ryan Lee <ryans.lee@maximintegrated.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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4eee20246c
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@ -250,6 +250,21 @@ static const int rate_table[] = {
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13000000, 19200000,
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};
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/* BCLKs per LRCLK */
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static const int bclk_sel_table[] = {
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32, 48, 64, 96, 128, 192, 256, 384, 512,
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};
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static int max98927_get_bclk_sel(int bclk)
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{
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int i;
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/* match BCLKs per LRCLK */
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for (i = 0; i < ARRAY_SIZE(bclk_sel_table); i++) {
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if (bclk_sel_table[i] == bclk)
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return i + 2;
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}
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return 0;
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}
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static int max98927_set_clock(struct max98927_priv *max98927,
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struct snd_pcm_hw_params *params)
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{
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@ -275,23 +290,20 @@ static int max98927_set_clock(struct max98927_priv *max98927,
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i << MAX98927_PCM_MASTER_MODE_MCLK_RATE_SHIFT);
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}
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switch (blr_clk_ratio) {
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case 32:
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value = 2;
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break;
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case 48:
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value = 3;
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break;
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case 64:
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value = 4;
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break;
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default:
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return -EINVAL;
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if (!max98927->tdm_mode) {
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/* BCLK configuration */
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value = max98927_get_bclk_sel(blr_clk_ratio);
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if (!value) {
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dev_err(codec->dev, "format unsupported %d\n",
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params_format(params));
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return -EINVAL;
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}
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regmap_update_bits(max98927->regmap,
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MAX98927_R0022_PCM_CLK_SETUP,
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MAX98927_PCM_CLK_SETUP_BSEL_MASK,
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value);
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}
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regmap_update_bits(max98927->regmap,
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MAX98927_R0022_PCM_CLK_SETUP,
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MAX98927_PCM_CLK_SETUP_BSEL_MASK,
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value);
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return 0;
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}
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@ -391,6 +403,78 @@ err:
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return -EINVAL;
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}
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static int max98927_dai_tdm_slot(struct snd_soc_dai *dai,
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unsigned int tx_mask, unsigned int rx_mask,
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int slots, int slot_width)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct max98927_priv *max98927 = snd_soc_codec_get_drvdata(codec);
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int bsel = 0;
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unsigned int chan_sz = 0;
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max98927->tdm_mode = true;
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/* BCLK configuration */
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bsel = max98927_get_bclk_sel(slots * slot_width);
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if (bsel == 0) {
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dev_err(codec->dev, "BCLK %d not supported\n",
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slots * slot_width);
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return -EINVAL;
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}
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regmap_update_bits(max98927->regmap,
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MAX98927_R0022_PCM_CLK_SETUP,
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MAX98927_PCM_CLK_SETUP_BSEL_MASK,
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bsel);
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/* Channel size configuration */
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switch (slot_width) {
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case 16:
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chan_sz = MAX98927_PCM_MODE_CFG_CHANSZ_16;
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break;
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case 24:
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chan_sz = MAX98927_PCM_MODE_CFG_CHANSZ_24;
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break;
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case 32:
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chan_sz = MAX98927_PCM_MODE_CFG_CHANSZ_32;
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break;
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default:
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dev_err(codec->dev, "format unsupported %d\n",
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slot_width);
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return -EINVAL;
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}
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regmap_update_bits(max98927->regmap,
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MAX98927_R0020_PCM_MODE_CFG,
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MAX98927_PCM_MODE_CFG_CHANSZ_MASK, chan_sz);
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/* Rx slot configuration */
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regmap_write(max98927->regmap,
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MAX98927_R0018_PCM_RX_EN_A,
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rx_mask & 0xFF);
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regmap_write(max98927->regmap,
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MAX98927_R0019_PCM_RX_EN_B,
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(rx_mask & 0xFF00) >> 8);
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/* Tx slot configuration */
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regmap_write(max98927->regmap,
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MAX98927_R001A_PCM_TX_EN_A,
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tx_mask & 0xFF);
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regmap_write(max98927->regmap,
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MAX98927_R001B_PCM_TX_EN_B,
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(tx_mask & 0xFF00) >> 8);
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/* Tx slot Hi-Z configuration */
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regmap_write(max98927->regmap,
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MAX98927_R001C_PCM_TX_HIZ_CTRL_A,
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~tx_mask & 0xFF);
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regmap_write(max98927->regmap,
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MAX98927_R001D_PCM_TX_HIZ_CTRL_B,
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(~tx_mask & 0xFF00) >> 8);
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return 0;
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}
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#define MAX98927_RATES SNDRV_PCM_RATE_8000_48000
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#define MAX98927_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
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@ -410,6 +494,7 @@ static const struct snd_soc_dai_ops max98927_dai_ops = {
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.set_sysclk = max98927_dai_set_sysclk,
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.set_fmt = max98927_dai_set_fmt,
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.hw_params = max98927_dai_hw_params,
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.set_tdm_slot = max98927_dai_tdm_slot,
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};
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static int max98927_dac_event(struct snd_soc_dapm_widget *w,
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@ -419,6 +504,9 @@ static int max98927_dac_event(struct snd_soc_dapm_widget *w,
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struct max98927_priv *max98927 = snd_soc_codec_get_drvdata(codec);
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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max98927->tdm_mode = 0;
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break;
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case SND_SOC_DAPM_POST_PMU:
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regmap_update_bits(max98927->regmap,
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MAX98927_R003A_AMP_EN,
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@ -270,5 +270,6 @@ struct max98927_priv {
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unsigned int iface;
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unsigned int master;
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unsigned int digital_gain;
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bool tdm_mode;
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};
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#endif
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