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https://github.com/edk2-porting/linux-next.git
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crypto: caam/qi - add GCM support
Add support for AES working in Galois Counter Mode. The following algorithms are added: gcm(aes) rfc4106(gcm(aes)) rfc4543(gcm(aes)) There is a limitation related to IV size, similar to the one present in SW implementation (crypto/gcm.c): The only IV size allowed is 12 bytes. It will be padded by HW to the right with 0x0000_0001 (up to 16 bytes - AES block size), according to the GCM specification. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Horia Geantă
Herbert Xu
parent
87ec3a0b1c
commit
d3e41b50b4
@ -284,6 +284,309 @@ badkey:
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return -EINVAL;
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}
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static int gcm_set_sh_desc(struct crypto_aead *aead)
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{
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struct caam_ctx *ctx = crypto_aead_ctx(aead);
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unsigned int ivsize = crypto_aead_ivsize(aead);
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int rem_bytes = CAAM_DESC_BYTES_MAX - DESC_JOB_IO_LEN -
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ctx->cdata.keylen;
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if (!ctx->cdata.keylen || !ctx->authsize)
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return 0;
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/*
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* Job Descriptor and Shared Descriptor
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* must fit into the 64-word Descriptor h/w Buffer
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*/
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if (rem_bytes >= DESC_QI_GCM_ENC_LEN) {
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ctx->cdata.key_inline = true;
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ctx->cdata.key_virt = ctx->key;
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} else {
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ctx->cdata.key_inline = false;
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ctx->cdata.key_dma = ctx->key_dma;
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}
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cnstr_shdsc_gcm_encap(ctx->sh_desc_enc, &ctx->cdata, ivsize,
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ctx->authsize, true);
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/*
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* Job Descriptor and Shared Descriptor
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* must fit into the 64-word Descriptor h/w Buffer
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*/
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if (rem_bytes >= DESC_QI_GCM_DEC_LEN) {
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ctx->cdata.key_inline = true;
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ctx->cdata.key_virt = ctx->key;
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} else {
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ctx->cdata.key_inline = false;
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ctx->cdata.key_dma = ctx->key_dma;
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}
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cnstr_shdsc_gcm_decap(ctx->sh_desc_dec, &ctx->cdata, ivsize,
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ctx->authsize, true);
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return 0;
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}
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static int gcm_setauthsize(struct crypto_aead *authenc, unsigned int authsize)
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{
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struct caam_ctx *ctx = crypto_aead_ctx(authenc);
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ctx->authsize = authsize;
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gcm_set_sh_desc(authenc);
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return 0;
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}
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static int gcm_setkey(struct crypto_aead *aead,
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const u8 *key, unsigned int keylen)
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{
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struct caam_ctx *ctx = crypto_aead_ctx(aead);
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struct device *jrdev = ctx->jrdev;
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int ret;
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#ifdef DEBUG
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print_hex_dump(KERN_ERR, "key in @" __stringify(__LINE__)": ",
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DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1);
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#endif
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memcpy(ctx->key, key, keylen);
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dma_sync_single_for_device(jrdev, ctx->key_dma, keylen, ctx->dir);
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ctx->cdata.keylen = keylen;
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ret = gcm_set_sh_desc(aead);
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if (ret)
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return ret;
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/* Now update the driver contexts with the new shared descriptor */
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if (ctx->drv_ctx[ENCRYPT]) {
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ret = caam_drv_ctx_update(ctx->drv_ctx[ENCRYPT],
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ctx->sh_desc_enc);
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if (ret) {
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dev_err(jrdev, "driver enc context update failed\n");
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return ret;
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}
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}
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if (ctx->drv_ctx[DECRYPT]) {
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ret = caam_drv_ctx_update(ctx->drv_ctx[DECRYPT],
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ctx->sh_desc_dec);
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if (ret) {
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dev_err(jrdev, "driver dec context update failed\n");
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return ret;
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}
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}
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return 0;
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}
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static int rfc4106_set_sh_desc(struct crypto_aead *aead)
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{
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struct caam_ctx *ctx = crypto_aead_ctx(aead);
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unsigned int ivsize = crypto_aead_ivsize(aead);
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int rem_bytes = CAAM_DESC_BYTES_MAX - DESC_JOB_IO_LEN -
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ctx->cdata.keylen;
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if (!ctx->cdata.keylen || !ctx->authsize)
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return 0;
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ctx->cdata.key_virt = ctx->key;
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/*
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* Job Descriptor and Shared Descriptor
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* must fit into the 64-word Descriptor h/w Buffer
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*/
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if (rem_bytes >= DESC_QI_RFC4106_ENC_LEN) {
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ctx->cdata.key_inline = true;
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} else {
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ctx->cdata.key_inline = false;
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ctx->cdata.key_dma = ctx->key_dma;
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}
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cnstr_shdsc_rfc4106_encap(ctx->sh_desc_enc, &ctx->cdata, ivsize,
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ctx->authsize, true);
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/*
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* Job Descriptor and Shared Descriptor
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* must fit into the 64-word Descriptor h/w Buffer
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*/
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if (rem_bytes >= DESC_QI_RFC4106_DEC_LEN) {
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ctx->cdata.key_inline = true;
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} else {
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ctx->cdata.key_inline = false;
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ctx->cdata.key_dma = ctx->key_dma;
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}
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cnstr_shdsc_rfc4106_decap(ctx->sh_desc_dec, &ctx->cdata, ivsize,
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ctx->authsize, true);
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return 0;
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}
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static int rfc4106_setauthsize(struct crypto_aead *authenc,
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unsigned int authsize)
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{
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struct caam_ctx *ctx = crypto_aead_ctx(authenc);
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ctx->authsize = authsize;
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rfc4106_set_sh_desc(authenc);
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return 0;
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}
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static int rfc4106_setkey(struct crypto_aead *aead,
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const u8 *key, unsigned int keylen)
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{
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struct caam_ctx *ctx = crypto_aead_ctx(aead);
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struct device *jrdev = ctx->jrdev;
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int ret;
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if (keylen < 4)
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return -EINVAL;
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#ifdef DEBUG
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print_hex_dump(KERN_ERR, "key in @" __stringify(__LINE__)": ",
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DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1);
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#endif
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memcpy(ctx->key, key, keylen);
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/*
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* The last four bytes of the key material are used as the salt value
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* in the nonce. Update the AES key length.
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*/
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ctx->cdata.keylen = keylen - 4;
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dma_sync_single_for_device(jrdev, ctx->key_dma, ctx->cdata.keylen,
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ctx->dir);
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ret = rfc4106_set_sh_desc(aead);
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if (ret)
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return ret;
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/* Now update the driver contexts with the new shared descriptor */
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if (ctx->drv_ctx[ENCRYPT]) {
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ret = caam_drv_ctx_update(ctx->drv_ctx[ENCRYPT],
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ctx->sh_desc_enc);
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if (ret) {
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dev_err(jrdev, "driver enc context update failed\n");
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return ret;
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}
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}
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if (ctx->drv_ctx[DECRYPT]) {
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ret = caam_drv_ctx_update(ctx->drv_ctx[DECRYPT],
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ctx->sh_desc_dec);
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if (ret) {
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dev_err(jrdev, "driver dec context update failed\n");
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return ret;
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}
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}
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return 0;
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}
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static int rfc4543_set_sh_desc(struct crypto_aead *aead)
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{
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struct caam_ctx *ctx = crypto_aead_ctx(aead);
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unsigned int ivsize = crypto_aead_ivsize(aead);
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int rem_bytes = CAAM_DESC_BYTES_MAX - DESC_JOB_IO_LEN -
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ctx->cdata.keylen;
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if (!ctx->cdata.keylen || !ctx->authsize)
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return 0;
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ctx->cdata.key_virt = ctx->key;
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/*
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* Job Descriptor and Shared Descriptor
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* must fit into the 64-word Descriptor h/w Buffer
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*/
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if (rem_bytes >= DESC_QI_RFC4543_ENC_LEN) {
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ctx->cdata.key_inline = true;
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} else {
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ctx->cdata.key_inline = false;
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ctx->cdata.key_dma = ctx->key_dma;
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}
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cnstr_shdsc_rfc4543_encap(ctx->sh_desc_enc, &ctx->cdata, ivsize,
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ctx->authsize, true);
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/*
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* Job Descriptor and Shared Descriptor
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* must fit into the 64-word Descriptor h/w Buffer
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*/
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if (rem_bytes >= DESC_QI_RFC4543_DEC_LEN) {
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ctx->cdata.key_inline = true;
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} else {
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ctx->cdata.key_inline = false;
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ctx->cdata.key_dma = ctx->key_dma;
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}
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cnstr_shdsc_rfc4543_decap(ctx->sh_desc_dec, &ctx->cdata, ivsize,
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ctx->authsize, true);
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return 0;
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}
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static int rfc4543_setauthsize(struct crypto_aead *authenc,
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unsigned int authsize)
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{
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struct caam_ctx *ctx = crypto_aead_ctx(authenc);
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ctx->authsize = authsize;
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rfc4543_set_sh_desc(authenc);
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return 0;
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}
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static int rfc4543_setkey(struct crypto_aead *aead,
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const u8 *key, unsigned int keylen)
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{
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struct caam_ctx *ctx = crypto_aead_ctx(aead);
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struct device *jrdev = ctx->jrdev;
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int ret;
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if (keylen < 4)
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return -EINVAL;
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#ifdef DEBUG
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print_hex_dump(KERN_ERR, "key in @" __stringify(__LINE__)": ",
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DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1);
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#endif
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memcpy(ctx->key, key, keylen);
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/*
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* The last four bytes of the key material are used as the salt value
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* in the nonce. Update the AES key length.
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*/
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ctx->cdata.keylen = keylen - 4;
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dma_sync_single_for_device(jrdev, ctx->key_dma, ctx->cdata.keylen,
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ctx->dir);
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ret = rfc4543_set_sh_desc(aead);
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if (ret)
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return ret;
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/* Now update the driver contexts with the new shared descriptor */
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if (ctx->drv_ctx[ENCRYPT]) {
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ret = caam_drv_ctx_update(ctx->drv_ctx[ENCRYPT],
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ctx->sh_desc_enc);
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if (ret) {
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dev_err(jrdev, "driver enc context update failed\n");
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return ret;
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}
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}
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if (ctx->drv_ctx[DECRYPT]) {
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ret = caam_drv_ctx_update(ctx->drv_ctx[DECRYPT],
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ctx->sh_desc_dec);
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if (ret) {
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dev_err(jrdev, "driver dec context update failed\n");
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return ret;
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}
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}
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return 0;
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}
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static int ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher,
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const u8 *key, unsigned int keylen)
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{
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@ -817,6 +1120,22 @@ static int aead_decrypt(struct aead_request *req)
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return aead_crypt(req, false);
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}
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static int ipsec_gcm_encrypt(struct aead_request *req)
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{
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if (req->assoclen < 8)
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return -EINVAL;
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return aead_crypt(req, true);
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}
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static int ipsec_gcm_decrypt(struct aead_request *req)
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{
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if (req->assoclen < 8)
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return -EINVAL;
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return aead_crypt(req, false);
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}
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static void ablkcipher_done(struct caam_drv_req *drv_req, u32 status)
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{
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struct ablkcipher_edesc *edesc;
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@ -1337,6 +1656,61 @@ static struct caam_alg_template driver_algs[] = {
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};
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static struct caam_aead_alg driver_aeads[] = {
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{
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.aead = {
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.base = {
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.cra_name = "rfc4106(gcm(aes))",
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.cra_driver_name = "rfc4106-gcm-aes-caam-qi",
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.cra_blocksize = 1,
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},
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.setkey = rfc4106_setkey,
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.setauthsize = rfc4106_setauthsize,
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.encrypt = ipsec_gcm_encrypt,
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.decrypt = ipsec_gcm_decrypt,
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.ivsize = 8,
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.maxauthsize = AES_BLOCK_SIZE,
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},
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.caam = {
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.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_GCM,
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},
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},
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{
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.aead = {
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.base = {
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.cra_name = "rfc4543(gcm(aes))",
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.cra_driver_name = "rfc4543-gcm-aes-caam-qi",
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.cra_blocksize = 1,
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},
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.setkey = rfc4543_setkey,
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.setauthsize = rfc4543_setauthsize,
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.encrypt = ipsec_gcm_encrypt,
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.decrypt = ipsec_gcm_decrypt,
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.ivsize = 8,
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.maxauthsize = AES_BLOCK_SIZE,
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},
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.caam = {
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.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_GCM,
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},
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},
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/* Galois Counter Mode */
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{
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.aead = {
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.base = {
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.cra_name = "gcm(aes)",
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.cra_driver_name = "gcm-aes-caam-qi",
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.cra_blocksize = 1,
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},
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.setkey = gcm_setkey,
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.setauthsize = gcm_setauthsize,
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.encrypt = aead_encrypt,
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.decrypt = aead_decrypt,
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.ivsize = 12,
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.maxauthsize = AES_BLOCK_SIZE,
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},
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.caam = {
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.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_GCM,
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}
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},
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/* single-pass ipsec_esp descriptor */
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{
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.aead = {
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