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drm/i915: move module parameters into a struct, in a new file
With 20+ module parameters, I think referring to them via a struct improves clarity over just having a bunch of globals. While at it, move the parameter initialization and definitions into a new file i915_params.c to reduce clutter in i915_drv.c. Apart from the ill-named i915_enable_rc6, i915_enable_fbc and i915_enable_ppgtt parameters, for which we lose the "i915_" prefix internally, the module parameters now look the same both on the kernel command line and in code. For example, "i915.modeset". The downsides of the change are losing static on a couple of variables and not having the initialization and module_param_named() right next to each other. On the other hand, all module parameters are now defined in one place at i915_params.c. Plus you can do this to find all module parameter references: $ git grep "i915\." -- drivers/gpu/drm/i915 v2: - move the definitions into a new file - s/i915_params/i915/ - make i915_try_reset i915.reset, for consistency Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Jani Nikula
Daniel Vetter
parent
2b7e8082b2
commit
d330a9530c
@ -14,6 +14,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o \
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i915_gem_gtt.o \
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i915_gem_stolen.o \
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i915_gem_tiling.o \
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i915_params.o \
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i915_sysfs.o \
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i915_trace_points.o \
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i915_ums.o \
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@ -38,120 +38,6 @@
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#include <linux/module.h>
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#include <drm/drm_crtc_helper.h>
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static int i915_modeset __read_mostly = -1;
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module_param_named(modeset, i915_modeset, int, 0400);
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MODULE_PARM_DESC(modeset,
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"Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, "
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"1=on, -1=force vga console preference [default])");
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int i915_panel_ignore_lid __read_mostly = 1;
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module_param_named(panel_ignore_lid, i915_panel_ignore_lid, int, 0600);
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MODULE_PARM_DESC(panel_ignore_lid,
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"Override lid status (0=autodetect, 1=autodetect disabled [default], "
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"-1=force lid closed, -2=force lid open)");
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unsigned int i915_powersave __read_mostly = 1;
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module_param_named(powersave, i915_powersave, int, 0600);
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MODULE_PARM_DESC(powersave,
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"Enable powersavings, fbc, downclocking, etc. (default: true)");
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int i915_semaphores __read_mostly = -1;
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module_param_named(semaphores, i915_semaphores, int, 0400);
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MODULE_PARM_DESC(semaphores,
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"Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))");
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int i915_enable_rc6 __read_mostly = -1;
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module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0400);
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MODULE_PARM_DESC(i915_enable_rc6,
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"Enable power-saving render C-state 6. "
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"Different stages can be selected via bitmask values "
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"(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). "
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"For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. "
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"default: -1 (use per-chip default)");
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int i915_enable_fbc __read_mostly = -1;
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module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600);
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MODULE_PARM_DESC(i915_enable_fbc,
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"Enable frame buffer compression for power savings "
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"(default: -1 (use per-chip default))");
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unsigned int i915_lvds_downclock __read_mostly = 0;
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module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
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MODULE_PARM_DESC(lvds_downclock,
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"Use panel (LVDS/eDP) downclocking for power savings "
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"(default: false)");
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int i915_lvds_channel_mode __read_mostly;
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module_param_named(lvds_channel_mode, i915_lvds_channel_mode, int, 0600);
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MODULE_PARM_DESC(lvds_channel_mode,
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"Specify LVDS channel mode "
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"(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
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int i915_panel_use_ssc __read_mostly = -1;
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module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600);
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MODULE_PARM_DESC(lvds_use_ssc,
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"Use Spread Spectrum Clock with panels [LVDS/eDP] "
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"(default: auto from VBT)");
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int i915_vbt_sdvo_panel_type __read_mostly = -1;
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module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600);
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MODULE_PARM_DESC(vbt_sdvo_panel_type,
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"Override/Ignore selection of SDVO panel mode in the VBT "
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"(-2=ignore, -1=auto [default], index in VBT BIOS table)");
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static bool i915_try_reset __read_mostly = true;
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module_param_named(reset, i915_try_reset, bool, 0600);
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MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)");
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bool i915_enable_hangcheck __read_mostly = true;
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module_param_named(enable_hangcheck, i915_enable_hangcheck, bool, 0644);
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MODULE_PARM_DESC(enable_hangcheck,
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"Periodically check GPU activity for detecting hangs. "
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"WARNING: Disabling this can cause system wide hangs. "
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"(default: true)");
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int i915_enable_ppgtt __read_mostly = -1;
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module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0400);
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MODULE_PARM_DESC(i915_enable_ppgtt,
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"Override PPGTT usage. "
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"(-1=auto [default], 0=disabled, 1=aliasing, 2=full)");
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int i915_enable_psr __read_mostly = 0;
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module_param_named(enable_psr, i915_enable_psr, int, 0600);
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MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)");
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unsigned int i915_preliminary_hw_support __read_mostly = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT);
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module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600);
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MODULE_PARM_DESC(preliminary_hw_support,
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"Enable preliminary hardware support.");
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int i915_disable_power_well __read_mostly = 1;
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module_param_named(disable_power_well, i915_disable_power_well, int, 0600);
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MODULE_PARM_DESC(disable_power_well,
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"Disable the power well when possible (default: true)");
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int i915_enable_ips __read_mostly = 1;
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module_param_named(enable_ips, i915_enable_ips, int, 0600);
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MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");
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bool i915_fastboot __read_mostly = 0;
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module_param_named(fastboot, i915_fastboot, bool, 0600);
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MODULE_PARM_DESC(fastboot, "Try to skip unnecessary mode sets at boot time "
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"(default: false)");
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int i915_enable_pc8 __read_mostly = 1;
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module_param_named(enable_pc8, i915_enable_pc8, int, 0600);
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MODULE_PARM_DESC(enable_pc8, "Enable support for low power package C states (PC8+) (default: true)");
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int i915_pc8_timeout __read_mostly = 5000;
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module_param_named(pc8_timeout, i915_pc8_timeout, int, 0600);
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MODULE_PARM_DESC(pc8_timeout, "Number of msecs of idleness required to enter PC8+ (default: 5000)");
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bool i915_prefault_disable __read_mostly;
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module_param_named(prefault_disable, i915_prefault_disable, bool, 0600);
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MODULE_PARM_DESC(prefault_disable,
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"Disable page prefaulting for pread/pwrite/reloc (default:false). For developers only.");
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static struct drm_driver driver;
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static const struct intel_device_info intel_i830_info = {
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@ -480,12 +366,12 @@ bool i915_semaphore_is_enabled(struct drm_device *dev)
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/* Until we get further testing... */
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if (IS_GEN8(dev)) {
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WARN_ON(!i915_preliminary_hw_support);
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WARN_ON(!i915.preliminary_hw_support);
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return false;
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}
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if (i915_semaphores >= 0)
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return i915_semaphores;
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if (i915.semaphores >= 0)
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return i915.semaphores;
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#ifdef CONFIG_INTEL_IOMMU
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/* Enable semaphores on SNB when IO remapping is off */
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@ -750,7 +636,7 @@ int i915_reset(struct drm_device *dev)
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bool simulated;
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int ret;
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if (!i915_try_reset)
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if (!i915.reset)
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return 0;
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mutex_lock(&dev->struct_mutex);
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@ -818,7 +704,7 @@ static int i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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struct intel_device_info *intel_info =
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(struct intel_device_info *) ent->driver_data;
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if (IS_PRELIMINARY_HW(intel_info) && !i915_preliminary_hw_support) {
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if (IS_PRELIMINARY_HW(intel_info) && !i915.preliminary_hw_support) {
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DRM_INFO("This hardware requires preliminary hardware support.\n"
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"See CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT, and/or modparam preliminary_hw_support\n");
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return -ENODEV;
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@ -1049,14 +935,14 @@ static int __init i915_init(void)
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* the default behavior.
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*/
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#if defined(CONFIG_DRM_I915_KMS)
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if (i915_modeset != 0)
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if (i915.modeset != 0)
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driver.driver_features |= DRIVER_MODESET;
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#endif
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if (i915_modeset == 1)
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if (i915.modeset == 1)
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driver.driver_features |= DRIVER_MODESET;
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#ifdef CONFIG_VGA_CONSOLE
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if (vgacon_text_force() && i915_modeset == -1)
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if (vgacon_text_force() && i915.modeset == -1)
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driver.driver_features &= ~DRIVER_MODESET;
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#endif
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@ -1891,31 +1891,39 @@ struct drm_i915_file_private {
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extern const struct drm_ioctl_desc i915_ioctls[];
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extern int i915_max_ioctl;
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extern int i915_panel_ignore_lid __read_mostly;
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extern unsigned int i915_powersave __read_mostly;
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extern int i915_semaphores __read_mostly;
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extern unsigned int i915_lvds_downclock __read_mostly;
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extern int i915_lvds_channel_mode __read_mostly;
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extern int i915_panel_use_ssc __read_mostly;
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extern int i915_vbt_sdvo_panel_type __read_mostly;
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extern int i915_enable_rc6 __read_mostly;
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extern int i915_enable_fbc __read_mostly;
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extern bool i915_enable_hangcheck __read_mostly;
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extern int i915_enable_ppgtt __read_mostly;
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extern int i915_enable_psr __read_mostly;
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extern unsigned int i915_preliminary_hw_support __read_mostly;
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extern int i915_disable_power_well __read_mostly;
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extern int i915_enable_ips __read_mostly;
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extern bool i915_fastboot __read_mostly;
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extern int i915_enable_pc8 __read_mostly;
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extern int i915_pc8_timeout __read_mostly;
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extern bool i915_prefault_disable __read_mostly;
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extern int i915_suspend(struct drm_device *dev, pm_message_t state);
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extern int i915_resume(struct drm_device *dev);
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extern int i915_master_create(struct drm_device *dev, struct drm_master *master);
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extern void i915_master_destroy(struct drm_device *dev, struct drm_master *master);
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/* i915_params.c */
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struct i915_params {
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int modeset;
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int panel_ignore_lid;
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unsigned int powersave;
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int semaphores;
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unsigned int lvds_downclock;
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int lvds_channel_mode;
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int panel_use_ssc;
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int vbt_sdvo_panel_type;
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int enable_rc6;
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int enable_fbc;
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bool enable_hangcheck;
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int enable_ppgtt;
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int enable_psr;
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unsigned int preliminary_hw_support;
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int disable_power_well;
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int enable_ips;
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bool fastboot;
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int enable_pc8;
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int pc8_timeout;
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bool prefault_disable;
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bool reset;
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int invert_brightness;
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};
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extern struct i915_params i915 __read_mostly;
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/* i915_dma.c */
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void i915_update_dri1_breadcrumb(struct drm_device *dev);
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extern void i915_kernel_lost_context(struct drm_device * dev);
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@ -2295,10 +2303,10 @@ static inline void i915_gem_chipset_flush(struct drm_device *dev)
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int i915_gem_init_ppgtt(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
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static inline bool intel_enable_ppgtt(struct drm_device *dev, bool full)
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{
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if (i915_enable_ppgtt == 0 || !HAS_ALIASING_PPGTT(dev))
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if (i915.enable_ppgtt == 0 || !HAS_ALIASING_PPGTT(dev))
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return false;
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if (i915_enable_ppgtt == 1 && full)
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if (i915.enable_ppgtt == 1 && full)
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return false;
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#ifdef CONFIG_INTEL_IOMMU
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@ -476,7 +476,7 @@ i915_gem_shmem_pread(struct drm_device *dev,
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mutex_unlock(&dev->struct_mutex);
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if (likely(!i915_prefault_disable) && !prefaulted) {
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if (likely(!i915.prefault_disable) && !prefaulted) {
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ret = fault_in_multipages_writeable(user_data, remain);
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/* Userspace is tricking us, but we've already clobbered
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* its pages with the prefault and promised to write the
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@ -868,7 +868,7 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
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args->size))
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return -EFAULT;
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if (likely(!i915_prefault_disable)) {
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if (likely(!i915.prefault_disable)) {
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ret = fault_in_multipages_readable(to_user_ptr(args->data_ptr),
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args->size);
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if (ret)
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@ -896,7 +896,7 @@ validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
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if (!access_ok(VERIFY_WRITE, ptr, length))
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return -EFAULT;
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if (likely(!i915_prefault_disable)) {
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if (likely(!i915.prefault_disable)) {
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if (fault_in_multipages_readable(ptr, length))
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return -EFAULT;
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}
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@ -1542,7 +1542,7 @@ static inline unsigned int gen8_get_total_gtt_size(u16 bdw_gmch_ctl)
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if (bdw_gmch_ctl)
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bdw_gmch_ctl = 1 << bdw_gmch_ctl;
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if (bdw_gmch_ctl > 4) {
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WARN_ON(!i915_preliminary_hw_support);
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WARN_ON(!i915.preliminary_hw_support);
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return 4<<20;
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}
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@ -2495,7 +2495,7 @@ static void i915_hangcheck_elapsed(unsigned long data)
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#define HUNG 20
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#define FIRE 30
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if (!i915_enable_hangcheck)
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if (!i915.enable_hangcheck)
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return;
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for_each_ring(ring, dev_priv, i) {
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@ -2597,7 +2597,7 @@ static void i915_hangcheck_elapsed(unsigned long data)
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void i915_queue_hangcheck(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (!i915_enable_hangcheck)
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if (!i915.enable_hangcheck)
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return;
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mod_timer(&dev_priv->gpu_error.hangcheck_timer,
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155
drivers/gpu/drm/i915/i915_params.c
Normal file
155
drivers/gpu/drm/i915/i915_params.c
Normal file
@ -0,0 +1,155 @@
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/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "i915_drv.h"
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struct i915_params i915 __read_mostly = {
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.modeset = -1,
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.panel_ignore_lid = 1,
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.powersave = 1,
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.semaphores = -1,
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.lvds_downclock = 0,
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.lvds_channel_mode = 0,
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.panel_use_ssc = -1,
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.vbt_sdvo_panel_type = -1,
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.enable_rc6 = -1,
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.enable_fbc = -1,
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.enable_hangcheck = true,
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.enable_ppgtt = -1,
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.enable_psr = 0,
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.preliminary_hw_support = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT),
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.disable_power_well = 1,
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.enable_ips = 1,
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.fastboot = 0,
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.enable_pc8 = 1,
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.pc8_timeout = 5000,
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.prefault_disable = 0,
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.reset = true,
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.invert_brightness = 0,
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};
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module_param_named(modeset, i915.modeset, int, 0400);
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MODULE_PARM_DESC(modeset,
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"Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, "
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"1=on, -1=force vga console preference [default])");
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module_param_named(panel_ignore_lid, i915.panel_ignore_lid, int, 0600);
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MODULE_PARM_DESC(panel_ignore_lid,
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"Override lid status (0=autodetect, 1=autodetect disabled [default], "
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"-1=force lid closed, -2=force lid open)");
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module_param_named(powersave, i915.powersave, int, 0600);
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MODULE_PARM_DESC(powersave,
|
||||
"Enable powersavings, fbc, downclocking, etc. (default: true)");
|
||||
|
||||
module_param_named(semaphores, i915.semaphores, int, 0400);
|
||||
MODULE_PARM_DESC(semaphores,
|
||||
"Use semaphores for inter-ring sync "
|
||||
"(default: -1 (use per-chip defaults))");
|
||||
|
||||
module_param_named(i915_enable_rc6, i915.enable_rc6, int, 0400);
|
||||
MODULE_PARM_DESC(i915_enable_rc6,
|
||||
"Enable power-saving render C-state 6. "
|
||||
"Different stages can be selected via bitmask values "
|
||||
"(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). "
|
||||
"For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. "
|
||||
"default: -1 (use per-chip default)");
|
||||
|
||||
module_param_named(i915_enable_fbc, i915.enable_fbc, int, 0600);
|
||||
MODULE_PARM_DESC(i915_enable_fbc,
|
||||
"Enable frame buffer compression for power savings "
|
||||
"(default: -1 (use per-chip default))");
|
||||
|
||||
module_param_named(lvds_downclock, i915.lvds_downclock, int, 0400);
|
||||
MODULE_PARM_DESC(lvds_downclock,
|
||||
"Use panel (LVDS/eDP) downclocking for power savings "
|
||||
"(default: false)");
|
||||
|
||||
module_param_named(lvds_channel_mode, i915.lvds_channel_mode, int, 0600);
|
||||
MODULE_PARM_DESC(lvds_channel_mode,
|
||||
"Specify LVDS channel mode "
|
||||
"(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
|
||||
|
||||
module_param_named(lvds_use_ssc, i915.panel_use_ssc, int, 0600);
|
||||
MODULE_PARM_DESC(lvds_use_ssc,
|
||||
"Use Spread Spectrum Clock with panels [LVDS/eDP] "
|
||||
"(default: auto from VBT)");
|
||||
|
||||
module_param_named(vbt_sdvo_panel_type, i915.vbt_sdvo_panel_type, int, 0600);
|
||||
MODULE_PARM_DESC(vbt_sdvo_panel_type,
|
||||
"Override/Ignore selection of SDVO panel mode in the VBT "
|
||||
"(-2=ignore, -1=auto [default], index in VBT BIOS table)");
|
||||
|
||||
module_param_named(reset, i915.reset, bool, 0600);
|
||||
MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)");
|
||||
|
||||
module_param_named(enable_hangcheck, i915.enable_hangcheck, bool, 0644);
|
||||
MODULE_PARM_DESC(enable_hangcheck,
|
||||
"Periodically check GPU activity for detecting hangs. "
|
||||
"WARNING: Disabling this can cause system wide hangs. "
|
||||
"(default: true)");
|
||||
|
||||
module_param_named(i915_enable_ppgtt, i915.enable_ppgtt, int, 0400);
|
||||
MODULE_PARM_DESC(i915_enable_ppgtt,
|
||||
"Override PPGTT usage. "
|
||||
"(-1=auto [default], 0=disabled, 1=aliasing, 2=full)");
|
||||
|
||||
module_param_named(enable_psr, i915.enable_psr, int, 0600);
|
||||
MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)");
|
||||
|
||||
module_param_named(preliminary_hw_support, i915.preliminary_hw_support, int, 0600);
|
||||
MODULE_PARM_DESC(preliminary_hw_support,
|
||||
"Enable preliminary hardware support.");
|
||||
|
||||
module_param_named(disable_power_well, i915.disable_power_well, int, 0600);
|
||||
MODULE_PARM_DESC(disable_power_well,
|
||||
"Disable the power well when possible (default: true)");
|
||||
|
||||
module_param_named(enable_ips, i915.enable_ips, int, 0600);
|
||||
MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");
|
||||
|
||||
module_param_named(fastboot, i915.fastboot, bool, 0600);
|
||||
MODULE_PARM_DESC(fastboot,
|
||||
"Try to skip unnecessary mode sets at boot time (default: false)");
|
||||
|
||||
module_param_named(enable_pc8, i915.enable_pc8, int, 0600);
|
||||
MODULE_PARM_DESC(enable_pc8,
|
||||
"Enable support for low power package C states (PC8+) (default: true)");
|
||||
|
||||
module_param_named(pc8_timeout, i915.pc8_timeout, int, 0600);
|
||||
MODULE_PARM_DESC(pc8_timeout,
|
||||
"Number of msecs of idleness required to enter PC8+ (default: 5000)");
|
||||
|
||||
module_param_named(prefault_disable, i915.prefault_disable, bool, 0600);
|
||||
MODULE_PARM_DESC(prefault_disable,
|
||||
"Disable page prefaulting for pread/pwrite/reloc (default:false). "
|
||||
"For developers only.");
|
||||
|
||||
module_param_named(invert_brightness, i915.invert_brightness, int, 0600);
|
||||
MODULE_PARM_DESC(invert_brightness,
|
||||
"Invert backlight brightness "
|
||||
"(-1 force normal, 0 machine defaults, 1 force inversion), please "
|
||||
"report PCI device ID, subsystem vendor and subsystem device ID "
|
||||
"to dri-devel@lists.freedesktop.org, if your machine needs it. "
|
||||
"It will then be included in an upcoming module version.");
|
||||
@ -259,7 +259,7 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
|
||||
downclock = dvo_timing->clock;
|
||||
}
|
||||
|
||||
if (downclock < panel_dvo_timing->clock && i915_lvds_downclock) {
|
||||
if (downclock < panel_dvo_timing->clock && i915.lvds_downclock) {
|
||||
dev_priv->lvds_downclock_avail = 1;
|
||||
dev_priv->lvds_downclock = downclock * 10;
|
||||
DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
|
||||
@ -318,7 +318,7 @@ parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
|
||||
struct drm_display_mode *panel_fixed_mode;
|
||||
int index;
|
||||
|
||||
index = i915_vbt_sdvo_panel_type;
|
||||
index = i915.vbt_sdvo_panel_type;
|
||||
if (index == -2) {
|
||||
DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
|
||||
return;
|
||||
|
||||
@ -2372,7 +2372,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
|
||||
* whether the platform allows pfit disable with pipe active, and only
|
||||
* then update the pipesrc and pfit state, even on the flip path.
|
||||
*/
|
||||
if (i915_fastboot) {
|
||||
if (i915.fastboot) {
|
||||
const struct drm_display_mode *adjusted_mode =
|
||||
&intel_crtc->config.adjusted_mode;
|
||||
|
||||
@ -4580,7 +4580,7 @@ retry:
|
||||
static void hsw_compute_ips_config(struct intel_crtc *crtc,
|
||||
struct intel_crtc_config *pipe_config)
|
||||
{
|
||||
pipe_config->ips_enabled = i915_enable_ips &&
|
||||
pipe_config->ips_enabled = i915.enable_ips &&
|
||||
hsw_crtc_supports_ips(crtc) &&
|
||||
pipe_config->pipe_bpp <= 24;
|
||||
}
|
||||
@ -4781,8 +4781,8 @@ intel_link_compute_m_n(int bits_per_pixel, int nlanes,
|
||||
|
||||
static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
if (i915_panel_use_ssc >= 0)
|
||||
return i915_panel_use_ssc != 0;
|
||||
if (i915.panel_use_ssc >= 0)
|
||||
return i915.panel_use_ssc != 0;
|
||||
return dev_priv->vbt.lvds_use_ssc
|
||||
&& !(dev_priv->quirks & QUIRK_LVDS_SSC_DISABLE);
|
||||
}
|
||||
@ -4841,7 +4841,7 @@ static void i9xx_update_pll_dividers(struct intel_crtc *crtc,
|
||||
|
||||
crtc->lowfreq_avail = false;
|
||||
if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_LVDS) &&
|
||||
reduced_clock && i915_powersave) {
|
||||
reduced_clock && i915.powersave) {
|
||||
I915_WRITE(FP1(pipe), fp2);
|
||||
crtc->config.dpll_hw_state.fp1 = fp2;
|
||||
crtc->lowfreq_avail = true;
|
||||
@ -6345,7 +6345,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
|
||||
if (intel_crtc->config.has_dp_encoder)
|
||||
intel_dp_set_m_n(intel_crtc);
|
||||
|
||||
if (is_lvds && has_reduced_clock && i915_powersave)
|
||||
if (is_lvds && has_reduced_clock && i915.powersave)
|
||||
intel_crtc->lowfreq_avail = true;
|
||||
else
|
||||
intel_crtc->lowfreq_avail = false;
|
||||
@ -6713,7 +6713,7 @@ static void __hsw_enable_package_c8(struct drm_i915_private *dev_priv)
|
||||
return;
|
||||
|
||||
schedule_delayed_work(&dev_priv->pc8.enable_work,
|
||||
msecs_to_jiffies(i915_pc8_timeout));
|
||||
msecs_to_jiffies(i915.pc8_timeout));
|
||||
}
|
||||
|
||||
static void __hsw_disable_package_c8(struct drm_i915_private *dev_priv)
|
||||
@ -6812,7 +6812,7 @@ static void hsw_update_package_c8(struct drm_device *dev)
|
||||
if (!HAS_PC8(dev_priv->dev))
|
||||
return;
|
||||
|
||||
if (!i915_enable_pc8)
|
||||
if (!i915.enable_pc8)
|
||||
return;
|
||||
|
||||
mutex_lock(&dev_priv->pc8.lock);
|
||||
@ -8210,7 +8210,7 @@ void intel_mark_idle(struct drm_device *dev)
|
||||
|
||||
hsw_package_c8_gpu_idle(dev_priv);
|
||||
|
||||
if (!i915_powersave)
|
||||
if (!i915.powersave)
|
||||
return;
|
||||
|
||||
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
|
||||
@ -8230,7 +8230,7 @@ void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
|
||||
struct drm_device *dev = obj->base.dev;
|
||||
struct drm_crtc *crtc;
|
||||
|
||||
if (!i915_powersave)
|
||||
if (!i915.powersave)
|
||||
return;
|
||||
|
||||
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
|
||||
@ -9893,7 +9893,7 @@ intel_set_config_compute_mode_changes(struct drm_mode_set *set,
|
||||
struct intel_crtc *intel_crtc =
|
||||
to_intel_crtc(set->crtc);
|
||||
|
||||
if (intel_crtc->active && i915_fastboot) {
|
||||
if (intel_crtc->active && i915.fastboot) {
|
||||
DRM_DEBUG_KMS("crtc has no fb, will flip\n");
|
||||
config->fb_changed = true;
|
||||
} else {
|
||||
@ -10144,7 +10144,7 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
|
||||
* flipping, so increasing its cost here shouldn't be a big
|
||||
* deal).
|
||||
*/
|
||||
if (i915_fastboot && ret == 0)
|
||||
if (i915.fastboot && ret == 0)
|
||||
intel_modeset_check_state(set->crtc->dev);
|
||||
}
|
||||
|
||||
@ -11382,7 +11382,7 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
|
||||
*/
|
||||
list_for_each_entry(crtc, &dev->mode_config.crtc_list,
|
||||
base.head) {
|
||||
if (crtc->active && i915_fastboot) {
|
||||
if (crtc->active && i915.fastboot) {
|
||||
intel_crtc_mode_from_pipe_config(crtc, &crtc->config);
|
||||
|
||||
DRM_DEBUG_KMS("[CRTC:%d] found active mode: ",
|
||||
|
||||
@ -1725,7 +1725,7 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
|
||||
return false;
|
||||
}
|
||||
|
||||
if (!i915_enable_psr) {
|
||||
if (!i915.enable_psr) {
|
||||
DRM_DEBUG_KMS("PSR disable by flag\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -848,8 +848,8 @@ static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
||||
/* use the module option value if specified */
|
||||
if (i915_lvds_channel_mode > 0)
|
||||
return i915_lvds_channel_mode == 2;
|
||||
if (i915.lvds_channel_mode > 0)
|
||||
return i915.lvds_channel_mode == 2;
|
||||
|
||||
if (dmi_check_system(intel_dual_link_lvds))
|
||||
return true;
|
||||
@ -1036,7 +1036,7 @@ void intel_lvds_init(struct drm_device *dev)
|
||||
intel_find_panel_downclock(dev,
|
||||
fixed_mode, connector);
|
||||
if (intel_connector->panel.downclock_mode !=
|
||||
NULL && i915_lvds_downclock) {
|
||||
NULL && i915.lvds_downclock) {
|
||||
/* We found the downclock for LVDS. */
|
||||
dev_priv->lvds_downclock_avail = true;
|
||||
dev_priv->lvds_downclock =
|
||||
|
||||
@ -323,13 +323,6 @@ out:
|
||||
pipe_config->gmch_pfit.lvds_border_bits = border;
|
||||
}
|
||||
|
||||
static int i915_panel_invert_brightness;
|
||||
MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
|
||||
"(-1 force normal, 0 machine defaults, 1 force inversion), please "
|
||||
"report PCI device ID, subsystem vendor and subsystem device ID "
|
||||
"to dri-devel@lists.freedesktop.org, if your machine needs it. "
|
||||
"It will then be included in an upcoming module version.");
|
||||
module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
|
||||
static u32 intel_panel_compute_brightness(struct intel_connector *connector,
|
||||
u32 val)
|
||||
{
|
||||
@ -339,10 +332,10 @@ static u32 intel_panel_compute_brightness(struct intel_connector *connector,
|
||||
|
||||
WARN_ON(panel->backlight.max == 0);
|
||||
|
||||
if (i915_panel_invert_brightness < 0)
|
||||
if (i915.invert_brightness < 0)
|
||||
return val;
|
||||
|
||||
if (i915_panel_invert_brightness > 0 ||
|
||||
if (i915.invert_brightness > 0 ||
|
||||
dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
|
||||
return panel->backlight.max - val;
|
||||
}
|
||||
@ -808,13 +801,13 @@ intel_panel_detect(struct drm_device *dev)
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
||||
/* Assume that the BIOS does not lie through the OpRegion... */
|
||||
if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
|
||||
if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
|
||||
return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
|
||||
connector_status_connected :
|
||||
connector_status_disconnected;
|
||||
}
|
||||
|
||||
switch (i915_panel_ignore_lid) {
|
||||
switch (i915.panel_ignore_lid) {
|
||||
case -2:
|
||||
return connector_status_connected;
|
||||
case -1:
|
||||
|
||||
@ -469,7 +469,7 @@ void intel_update_fbc(struct drm_device *dev)
|
||||
return;
|
||||
}
|
||||
|
||||
if (!i915_powersave) {
|
||||
if (!i915.powersave) {
|
||||
if (set_no_fbc_reason(dev_priv, FBC_MODULE_PARAM))
|
||||
DRM_DEBUG_KMS("fbc disabled per module param\n");
|
||||
return;
|
||||
@ -508,13 +508,13 @@ void intel_update_fbc(struct drm_device *dev)
|
||||
obj = intel_fb->obj;
|
||||
adjusted_mode = &intel_crtc->config.adjusted_mode;
|
||||
|
||||
if (i915_enable_fbc < 0 &&
|
||||
if (i915.enable_fbc < 0 &&
|
||||
INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) {
|
||||
if (set_no_fbc_reason(dev_priv, FBC_CHIP_DEFAULT))
|
||||
DRM_DEBUG_KMS("disabled per chip default\n");
|
||||
goto out_disable;
|
||||
}
|
||||
if (!i915_enable_fbc) {
|
||||
if (!i915.enable_fbc) {
|
||||
if (set_no_fbc_reason(dev_priv, FBC_MODULE_PARAM))
|
||||
DRM_DEBUG_KMS("fbc disabled per module param\n");
|
||||
goto out_disable;
|
||||
@ -3154,8 +3154,8 @@ int intel_enable_rc6(const struct drm_device *dev)
|
||||
return 0;
|
||||
|
||||
/* Respect the kernel parameter if it is set */
|
||||
if (i915_enable_rc6 >= 0)
|
||||
return i915_enable_rc6;
|
||||
if (i915.enable_rc6 >= 0)
|
||||
return i915.enable_rc6;
|
||||
|
||||
/* Disable RC6 on Ironlake */
|
||||
if (INTEL_INFO(dev)->gen == 5)
|
||||
@ -5279,7 +5279,7 @@ static void __intel_power_well_put(struct drm_device *dev,
|
||||
WARN_ON(!power_well->count);
|
||||
|
||||
if (!--power_well->count && power_well->set &&
|
||||
i915_disable_power_well) {
|
||||
i915.disable_power_well) {
|
||||
power_well->set(dev, power_well, false);
|
||||
hsw_enable_package_c8(dev_priv);
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user