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spi: dw: Fix detecting FIFO depth
Current code tries to find the highest valid fifo depth by checking the value it wrote to DW_SPI_TXFLTR. There are a few problems in current code: 1) There is an off-by-one in dws->fifo_len setting because it assumes the latest register write fails so the latest valid value should be fifo - 1. 2) We know the depth could be from 2 to 256 from HW spec, so it is not necessary to test fifo == 257. In the case fifo is 257, it means the latest valid setting is fifo = 256. So after the for loop iteration, we should check fifo == 2 case instead of fifo == 257 if detecting the FIFO depth fails. This patch fixes above issues. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-and-tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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@ -621,13 +621,13 @@ static void spi_hw_init(struct dw_spi *dws)
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if (!dws->fifo_len) {
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if (!dws->fifo_len) {
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u32 fifo;
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u32 fifo;
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for (fifo = 2; fifo <= 257; fifo++) {
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for (fifo = 2; fifo <= 256; fifo++) {
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dw_writew(dws, DW_SPI_TXFLTR, fifo);
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dw_writew(dws, DW_SPI_TXFLTR, fifo);
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if (fifo != dw_readw(dws, DW_SPI_TXFLTR))
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if (fifo != dw_readw(dws, DW_SPI_TXFLTR))
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break;
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break;
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}
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}
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dws->fifo_len = (fifo == 257) ? 0 : fifo;
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dws->fifo_len = (fifo == 2) ? 0 : fifo - 1;
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dw_writew(dws, DW_SPI_TXFLTR, 0);
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dw_writew(dws, DW_SPI_TXFLTR, 0);
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}
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}
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}
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}
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