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xhci: Fix driver hang and resume error path.
Hi Greg, Here's two bug fixes for 3.5. The first fixes an issue with port connections not being reported to the USB core after a system resume. The second fixes a driver hang when there are two back to back stalls on an endpoint. Sarah Sharp -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJP8fwtAAoJEBMGWMLi1Gc5KrwP/0acHiWeflQ+uo1VKsZayh0k jf8TE55Noopoem8R0GVQQILMvvcGZQDdIZ9frSaR+Fm7oQLf/OfuVgehEUfnMzX3 rjSl5yk3pS37dLjYWIROUYGPBxoGCO/WpHxh53eGhgV9gV6ToG6tJo/a8ysj4K90 HmwWYPp/BPmAMYepRdKQSNvTUj8VaLR/F1zPZA+evNYoTFL5xY6aejjrMmI6TiIC N1x7b/KdDbT1XC1VS/ZhAzkdCZ49rdUiE9KCL9TWrSWMGWY408ApSWkusfY0w2Yi /A3PrlACt56N6yfOcqHXLoYpE6GAvCnvBZDztVlauqwFn3szzlMKMhtJgtLAalKQ +HenE0N5x02FX2WYO1zV2Lraesa93U9HwQGnuXnsd1yXvkEDZJziQLrXI6Q0qMvz ImSIcCUbZanPSmXAfOKwXOKba5A/Ep5bwftERfIuKlbJbBSlQ/dCeLaInrlFLcGb Q490pYC9poGx9raGZWgcSPj9JmPd5XYqSjc6wq/IFdrzrKFY1AWHn4m/tlGihzd0 JIst/vP5LAoAlApWAWFLhoSzA/+tFI3JLO7meJcgURJAe+XX7vzZCe3kYHc2HPLT DjYdmgw6K+FVzy7BJ673dDKzFB/B0bj/MeLtv79q0ybrG2dZX7lbS44fOw2Wt4M0 DMO6Kc8dIQdYhl9wCgzj =FB8L -----END PGP SIGNATURE----- Merge tag 'for-usb-linus-2012-07-02' of git://git.kernel.org/pub/scm/linux/kernel/git/sarah/xhci into usb-linus xhci: Fix driver hang and resume error path. Hi Greg, Here's two bug fixes for 3.5. The first fixes an issue with port connections not being reported to the USB core after a system resume. The second fixes a driver hang when there are two back to back stalls on an endpoint. Sarah Sharp
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d25ae36934
@ -2324,12 +2324,16 @@ static unsigned hub_is_wusb(struct usb_hub *hub)
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static int hub_port_reset(struct usb_hub *hub, int port1,
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struct usb_device *udev, unsigned int delay, bool warm);
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/* Is a USB 3.0 port in the Inactive state? */
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static bool hub_port_inactive(struct usb_hub *hub, u16 portstatus)
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/* Is a USB 3.0 port in the Inactive or Complinance Mode state?
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* Port worm reset is required to recover
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*/
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static bool hub_port_warm_reset_required(struct usb_hub *hub, u16 portstatus)
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{
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return hub_is_superspeed(hub->hdev) &&
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(portstatus & USB_PORT_STAT_LINK_STATE) ==
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USB_SS_PORT_LS_SS_INACTIVE;
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(((portstatus & USB_PORT_STAT_LINK_STATE) ==
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USB_SS_PORT_LS_SS_INACTIVE) ||
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((portstatus & USB_PORT_STAT_LINK_STATE) ==
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USB_SS_PORT_LS_COMP_MOD)) ;
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}
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static int hub_port_wait_reset(struct usb_hub *hub, int port1,
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@ -2365,7 +2369,7 @@ static int hub_port_wait_reset(struct usb_hub *hub, int port1,
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*
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* See https://bugzilla.kernel.org/show_bug.cgi?id=41752
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*/
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if (hub_port_inactive(hub, portstatus)) {
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if (hub_port_warm_reset_required(hub, portstatus)) {
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int ret;
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if ((portchange & USB_PORT_STAT_C_CONNECTION))
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@ -4408,9 +4412,7 @@ static void hub_events(void)
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/* Warm reset a USB3 protocol port if it's in
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* SS.Inactive state.
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*/
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if (hub_is_superspeed(hub->hdev) &&
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(portstatus & USB_PORT_STAT_LINK_STATE)
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== USB_SS_PORT_LS_SS_INACTIVE) {
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if (hub_port_warm_reset_required(hub, portstatus)) {
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dev_dbg(hub_dev, "warm reset port %d\n", i);
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hub_port_reset(hub, i, NULL,
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HUB_BH_RESET_TIME, true);
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@ -462,6 +462,42 @@ void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array,
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}
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}
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/* Updates Link Status for super Speed port */
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static void xhci_hub_report_link_state(u32 *status, u32 status_reg)
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{
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u32 pls = status_reg & PORT_PLS_MASK;
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/* resume state is a xHCI internal state.
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* Do not report it to usb core.
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*/
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if (pls == XDEV_RESUME)
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return;
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/* When the CAS bit is set then warm reset
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* should be performed on port
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*/
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if (status_reg & PORT_CAS) {
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/* The CAS bit can be set while the port is
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* in any link state.
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* Only roothubs have CAS bit, so we
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* pretend to be in compliance mode
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* unless we're already in compliance
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* or the inactive state.
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*/
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if (pls != USB_SS_PORT_LS_COMP_MOD &&
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pls != USB_SS_PORT_LS_SS_INACTIVE) {
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pls = USB_SS_PORT_LS_COMP_MOD;
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}
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/* Return also connection bit -
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* hub state machine resets port
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* when this bit is set.
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*/
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pls |= USB_PORT_STAT_CONNECTION;
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}
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/* update status field */
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*status |= pls;
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}
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int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
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u16 wIndex, char *buf, u16 wLength)
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{
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@ -606,13 +642,9 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
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else
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status |= USB_PORT_STAT_POWER;
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}
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/* Port Link State */
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/* Update Port Link State for super speed ports*/
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if (hcd->speed == HCD_USB3) {
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/* resume state is a xHCI internal state.
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* Do not report it to usb core.
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*/
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if ((temp & PORT_PLS_MASK) != XDEV_RESUME)
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status |= (temp & PORT_PLS_MASK);
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xhci_hub_report_link_state(&status, temp);
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}
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if (bus_state->port_c_suspend & (1 << wIndex))
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status |= 1 << USB_PORT_FEAT_C_SUSPEND;
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@ -885,6 +885,17 @@ static void update_ring_for_set_deq_completion(struct xhci_hcd *xhci,
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num_trbs_free_temp = ep_ring->num_trbs_free;
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dequeue_temp = ep_ring->dequeue;
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/* If we get two back-to-back stalls, and the first stalled transfer
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* ends just before a link TRB, the dequeue pointer will be left on
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* the link TRB by the code in the while loop. So we have to update
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* the dequeue pointer one segment further, or we'll jump off
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* the segment into la-la-land.
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*/
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if (last_trb(xhci, ep_ring, ep_ring->deq_seg, ep_ring->dequeue)) {
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ep_ring->deq_seg = ep_ring->deq_seg->next;
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ep_ring->dequeue = ep_ring->deq_seg->trbs;
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}
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while (ep_ring->dequeue != dev->eps[ep_index].queued_deq_ptr) {
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/* We have more usable TRBs */
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ep_ring->num_trbs_free++;
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@ -341,7 +341,11 @@ struct xhci_op_regs {
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#define PORT_PLC (1 << 22)
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/* port configure error change - port failed to configure its link partner */
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#define PORT_CEC (1 << 23)
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/* bit 24 reserved */
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/* Cold Attach Status - xHC can set this bit to report device attached during
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* Sx state. Warm port reset should be perfomed to clear this bit and move port
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* to connected state.
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*/
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#define PORT_CAS (1 << 24)
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/* wake on connect (enable) */
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#define PORT_WKCONN_E (1 << 25)
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/* wake on disconnect (enable) */
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