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https://github.com/edk2-porting/linux-next.git
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isdn: hisax: remove some dead code
The HISAX_HFC4S8S_PCIMEM code hasn't been able to compile since before the start of git history. I have deleted it. There are also a few indenting mistakes where one side of the ifdef wasn't indented correctly which I fixed as well. Reported-by: Walter Harms <wharms@bfs.de> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Dan Carpenter
David S. Miller
parent
d28071d102
commit
d1f88a667c
@ -197,25 +197,6 @@ typedef struct _hfc4s8s_hw {
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/***************************/
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/* inline function defines */
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/***************************/
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#ifdef HISAX_HFC4S8S_PCIMEM /* inline functions memory mapped */
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/* memory write and dummy IO read to avoid PCI byte merge problems */
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#define Write_hfc8(a, b, c) {(*((volatile u_char *)(a->membase + b)) = c); inb(a->iobase + 4);}
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/* memory write without dummy IO access for fifo data access */
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#define fWrite_hfc8(a, b, c) (*((volatile u_char *)(a->membase + b)) = c)
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#define Read_hfc8(a, b) (*((volatile u_char *)(a->membase + b)))
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#define Write_hfc16(a, b, c) (*((volatile unsigned short *)(a->membase + b)) = c)
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#define Read_hfc16(a, b) (*((volatile unsigned short *)(a->membase + b)))
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#define Write_hfc32(a, b, c) (*((volatile unsigned long *)(a->membase + b)) = c)
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#define Read_hfc32(a, b) (*((volatile unsigned long *)(a->membase + b)))
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#define wait_busy(a) {while ((Read_hfc8(a, R_STATUS) & M_BUSY));}
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#define PCI_ENA_MEMIO 0x03
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#else
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/* inline functions io mapped */
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static inline void
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SetRegAddr(hfc4s8s_hw *a, u_char b)
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@ -306,8 +287,6 @@ wait_busy(hfc4s8s_hw *a)
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#define PCI_ENA_REGIO 0x01
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#endif /* HISAX_HFC4S8S_PCIMEM */
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/******************************************************/
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/* function to read critical counter registers that */
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/* may be updated by the chip during read */
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@ -724,26 +703,15 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech)
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return;
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} else {
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/* read errornous D frame */
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#ifndef HISAX_HFC4S8S_PCIMEM
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SetRegAddr(l1p->hw, A_FIFO_DATA0);
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#endif
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while (z1 >= 4) {
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#ifdef HISAX_HFC4S8S_PCIMEM
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Read_hfc32(l1p->hw, A_FIFO_DATA0);
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#else
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fRead_hfc32(l1p->hw);
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#endif
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z1 -= 4;
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}
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while (z1--)
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#ifdef HISAX_HFC4S8S_PCIMEM
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Read_hfc8(l1p->hw, A_FIFO_DATA0);
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#else
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fRead_hfc8(l1p->hw);
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#endif
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fRead_hfc8(l1p->hw);
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Write_hfc8(l1p->hw, A_INC_RES_FIFO, 1);
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wait_busy(l1p->hw);
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@ -753,27 +721,16 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech)
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cp = skb->data;
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#ifndef HISAX_HFC4S8S_PCIMEM
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SetRegAddr(l1p->hw, A_FIFO_DATA0);
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#endif
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while (z1 >= 4) {
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#ifdef HISAX_HFC4S8S_PCIMEM
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*((unsigned long *) cp) =
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Read_hfc32(l1p->hw, A_FIFO_DATA0);
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#else
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*((unsigned long *) cp) = fRead_hfc32(l1p->hw);
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#endif
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cp += 4;
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z1 -= 4;
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}
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while (z1--)
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#ifdef HISAX_HFC4S8S_PCIMEM
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*cp++ = Read_hfc8(l1p->hw, A_FIFO_DATA0);
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#else
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*cp++ = fRead_hfc8(l1p->hw);
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#endif
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*cp++ = fRead_hfc8(l1p->hw);
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Write_hfc8(l1p->hw, A_INC_RES_FIFO, 1); /* increment f counter */
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wait_busy(l1p->hw);
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@ -859,28 +816,17 @@ rx_b_frame(struct hfc4s8s_btype *bch)
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wait_busy(l1->hw);
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return;
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}
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#ifndef HISAX_HFC4S8S_PCIMEM
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SetRegAddr(l1->hw, A_FIFO_DATA0);
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#endif
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while (z1 >= 4) {
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#ifdef HISAX_HFC4S8S_PCIMEM
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*((unsigned long *) bch->rx_ptr) =
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Read_hfc32(l1->hw, A_FIFO_DATA0);
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#else
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*((unsigned long *) bch->rx_ptr) =
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fRead_hfc32(l1->hw);
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#endif
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bch->rx_ptr += 4;
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z1 -= 4;
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}
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while (z1--)
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#ifdef HISAX_HFC4S8S_PCIMEM
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*(bch->rx_ptr++) = Read_hfc8(l1->hw, A_FIFO_DATA0);
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#else
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*(bch->rx_ptr++) = fRead_hfc8(l1->hw);
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#endif
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*(bch->rx_ptr++) = fRead_hfc8(l1->hw);
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if (hdlc_complete) {
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/* increment f counter */
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@ -940,29 +886,17 @@ tx_d_frame(struct hfc4s8s_l1 *l1p)
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if ((skb = skb_dequeue(&l1p->d_tx_queue))) {
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cp = skb->data;
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cnt = skb->len;
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#ifndef HISAX_HFC4S8S_PCIMEM
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SetRegAddr(l1p->hw, A_FIFO_DATA0);
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#endif
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while (cnt >= 4) {
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#ifdef HISAX_HFC4S8S_PCIMEM
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fWrite_hfc32(l1p->hw, A_FIFO_DATA0,
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*(unsigned long *) cp);
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#else
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SetRegAddr(l1p->hw, A_FIFO_DATA0);
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fWrite_hfc32(l1p->hw, *(unsigned long *) cp);
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#endif
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cp += 4;
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cnt -= 4;
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}
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#ifdef HISAX_HFC4S8S_PCIMEM
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while (cnt--)
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fWrite_hfc8(l1p->hw, A_FIFO_DATA0, *cp++);
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#else
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while (cnt--)
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fWrite_hfc8(l1p->hw, *cp++);
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#endif
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l1p->tx_cnt = skb->truesize;
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Write_hfc8(l1p->hw, A_INC_RES_FIFO, 1); /* increment f counter */
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@ -1037,26 +971,15 @@ tx_b_frame(struct hfc4s8s_btype *bch)
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cp = skb->data + bch->tx_cnt;
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bch->tx_cnt += cnt;
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#ifndef HISAX_HFC4S8S_PCIMEM
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SetRegAddr(l1->hw, A_FIFO_DATA0);
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#endif
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while (cnt >= 4) {
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#ifdef HISAX_HFC4S8S_PCIMEM
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fWrite_hfc32(l1->hw, A_FIFO_DATA0,
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*(unsigned long *) cp);
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#else
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fWrite_hfc32(l1->hw, *(unsigned long *) cp);
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#endif
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cp += 4;
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cnt -= 4;
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}
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while (cnt--)
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#ifdef HISAX_HFC4S8S_PCIMEM
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fWrite_hfc8(l1->hw, A_FIFO_DATA0, *cp++);
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#else
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fWrite_hfc8(l1->hw, *cp++);
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#endif
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fWrite_hfc8(l1->hw, *cp++);
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if (bch->tx_cnt >= skb->len) {
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if (bch->mode == L1_MODE_HDLC) {
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@ -1281,10 +1204,8 @@ hfc4s8s_interrupt(int intno, void *dev_id)
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if (!hw || !(hw->mr.r_irq_ctrl & M_GLOB_IRQ_EN))
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return IRQ_NONE;
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#ifndef HISAX_HFC4S8S_PCIMEM
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/* read current selected regsister */
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old_ioreg = GetRegAddr(hw);
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#endif
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/* Layer 1 State change */
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hw->mr.r_irq_statech |=
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@ -1292,9 +1213,7 @@ hfc4s8s_interrupt(int intno, void *dev_id)
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if (!
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(b = (Read_hfc8(hw, R_STATUS) & (M_MISC_IRQSTA | M_FR_IRQSTA)))
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&& !hw->mr.r_irq_statech) {
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#ifndef HISAX_HFC4S8S_PCIMEM
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SetRegAddr(hw, old_ioreg);
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#endif
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return IRQ_NONE;
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}
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@ -1322,9 +1241,7 @@ hfc4s8s_interrupt(int intno, void *dev_id)
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/* queue the request to allow other cards to interrupt */
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schedule_work(&hw->tqueue);
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#ifndef HISAX_HFC4S8S_PCIMEM
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SetRegAddr(hw, old_ioreg);
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#endif
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return IRQ_HANDLED;
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} /* hfc4s8s_interrupt */
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@ -1471,13 +1388,8 @@ static void
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release_pci_ports(hfc4s8s_hw *hw)
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{
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pci_write_config_word(hw->pdev, PCI_COMMAND, 0);
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#ifdef HISAX_HFC4S8S_PCIMEM
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if (hw->membase)
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iounmap((void *) hw->membase);
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#else
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if (hw->iobase)
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release_region(hw->iobase, 8);
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#endif
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}
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/*****************************************/
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@ -1486,11 +1398,7 @@ release_pci_ports(hfc4s8s_hw *hw)
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static void
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enable_pci_ports(hfc4s8s_hw *hw)
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{
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#ifdef HISAX_HFC4S8S_PCIMEM
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pci_write_config_word(hw->pdev, PCI_COMMAND, PCI_ENA_MEMIO);
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#else
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pci_write_config_word(hw->pdev, PCI_COMMAND, PCI_ENA_REGIO);
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#endif
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}
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/*************************************/
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@ -1561,15 +1469,9 @@ setup_instance(hfc4s8s_hw *hw)
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hw->irq);
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goto out;
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}
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#ifdef HISAX_HFC4S8S_PCIMEM
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printk(KERN_INFO
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"HFC-4S/8S: found PCI card at membase 0x%p, irq %d\n",
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hw->hw_membase, hw->irq);
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#else
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printk(KERN_INFO
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"HFC-4S/8S: found PCI card at iobase 0x%x, irq %d\n",
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hw->iobase, hw->irq);
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#endif
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hfc_hardware_enable(hw, 1, 0);
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@ -1614,17 +1516,12 @@ hfc4s8s_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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hw->irq = pdev->irq;
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hw->iobase = pci_resource_start(pdev, 0);
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#ifdef HISAX_HFC4S8S_PCIMEM
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hw->hw_membase = (u_char *) pci_resource_start(pdev, 1);
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hw->membase = ioremap((ulong) hw->hw_membase, 256);
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#else
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if (!request_region(hw->iobase, 8, hw->card_name)) {
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printk(KERN_INFO
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"HFC-4S/8S: failed to request address space at 0x%04x\n",
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hw->iobase);
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goto out;
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}
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#endif
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pci_set_drvdata(pdev, hw);
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err = setup_instance(hw);
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