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drm/ast: POST chip at probe time if VGA not enabled
We need to do it on machines without a BIOS such as POWER8. Also for detection to work without triggering PCIe errors, we need to enable VGA early on, inside ast_detect_chip(). While touching those files, replace a few hard coded register numbers with the corresponding symbolic constant. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -384,6 +384,9 @@ int ast_bo_push_sysram(struct ast_bo *bo);
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int ast_mmap(struct file *filp, struct vm_area_struct *vma);
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/* ast post */
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void ast_enable_vga(struct drm_device *dev);
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void ast_enable_mmio(struct drm_device *dev);
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bool ast_is_vga_enabled(struct drm_device *dev);
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void ast_post_gpu(struct drm_device *dev);
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u32 ast_mindwm(struct ast_private *ast, u32 r);
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void ast_moutdwm(struct ast_private *ast, u32 r, u32 v);
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@ -63,7 +63,7 @@ uint8_t ast_get_index_reg_mask(struct ast_private *ast,
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}
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static int ast_detect_chip(struct drm_device *dev)
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static int ast_detect_chip(struct drm_device *dev, bool *need_post)
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{
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struct ast_private *ast = dev->dev_private;
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uint32_t data, jreg;
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@ -109,6 +109,21 @@ static int ast_detect_chip(struct drm_device *dev)
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}
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}
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/*
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* If VGA isn't enabled, we need to enable now or subsequent
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* access to the scratch registers will fail. We also inform
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* our caller that it needs to POST the chip
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* (Assumption: VGA not enabled -> need to POST)
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*/
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if (!ast_is_vga_enabled(dev)) {
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ast_enable_vga(dev);
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ast_enable_mmio(dev);
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DRM_INFO("VGA not enabled on entry, requesting chip POST\n");
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*need_post = true;
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} else
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*need_post = false;
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/* Check if we support wide screen */
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switch (ast->chip) {
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case AST1180:
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ast->support_wide_screen = true;
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@ -124,6 +139,7 @@ static int ast_detect_chip(struct drm_device *dev)
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ast->support_wide_screen = true;
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else {
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ast->support_wide_screen = false;
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/* Read SCU7c (silicon revision register) */
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ast_write32(ast, 0xf004, 0x1e6e0000);
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ast_write32(ast, 0xf000, 0x1);
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data = ast_read32(ast, 0x1207c);
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@ -136,11 +152,23 @@ static int ast_detect_chip(struct drm_device *dev)
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break;
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}
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/* Check 3rd Tx option (digital output afaik) */
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ast->tx_chip_type = AST_TX_NONE;
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/*
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* VGACRA3 Enhanced Color Mode Register, check if DVO is already
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* enabled, in that case, assume we have a SIL164 TMDS transmitter
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*/
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jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff);
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if (jreg & 0x80)
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ast->tx_chip_type = AST_TX_SIL164;
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if ((ast->chip == AST2300) || (ast->chip == AST2400)) {
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/*
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* On AST2300 and 2400, look the configuration set by the SoC in
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* the SOC scratch register #1 bits 11:8 (interestingly marked
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* as "reserved" in the spec
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*/
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jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
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switch (jreg) {
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case 0x04:
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@ -161,6 +189,17 @@ static int ast_detect_chip(struct drm_device *dev)
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}
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}
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/* Print stuff for diagnostic purposes */
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switch(ast->tx_chip_type) {
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case AST_TX_SIL164:
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DRM_INFO("Using Sil164 TMDS transmitter\n");
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break;
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case AST_TX_DP501:
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DRM_INFO("Using DP501 DisplayPort transmitter\n");
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break;
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default:
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DRM_INFO("Analog VGA only\n");
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}
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return 0;
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}
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@ -345,6 +384,7 @@ static u32 ast_get_vram_info(struct drm_device *dev)
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int ast_driver_load(struct drm_device *dev, unsigned long flags)
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{
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struct ast_private *ast;
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bool need_post;
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int ret = 0;
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ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL);
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@ -379,7 +419,7 @@ int ast_driver_load(struct drm_device *dev, unsigned long flags)
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}
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}
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ast_detect_chip(dev);
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ast_detect_chip(dev, &need_post);
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if (ast->chip != AST1180) {
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ast_get_dram_info(dev);
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@ -387,6 +427,9 @@ int ast_driver_load(struct drm_device *dev, unsigned long flags)
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DRM_INFO("dram %d %d %d %08x\n", ast->mclk, ast->dram_type, ast->dram_bus_width, ast->vram_size);
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}
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if (need_post)
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ast_post_gpu(dev);
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ret = ast_mm_init(ast);
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if (ret)
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goto out_free;
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@ -33,18 +33,23 @@
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static void ast_init_dram_2300(struct drm_device *dev);
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static void
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ast_enable_vga(struct drm_device *dev)
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void ast_enable_vga(struct drm_device *dev)
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{
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struct ast_private *ast = dev->dev_private;
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ast_io_write8(ast, 0x43, 0x01);
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ast_io_write8(ast, 0x42, 0x01);
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ast_io_write8(ast, AST_IO_VGA_ENABLE_PORT, 0x01);
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ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, 0x01);
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}
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#if 0 /* will use later */
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static bool
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ast_is_vga_enabled(struct drm_device *dev)
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void ast_enable_mmio(struct drm_device *dev)
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{
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struct ast_private *ast = dev->dev_private;
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ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04);
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}
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bool ast_is_vga_enabled(struct drm_device *dev)
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{
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struct ast_private *ast = dev->dev_private;
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u8 ch;
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@ -52,7 +57,7 @@ ast_is_vga_enabled(struct drm_device *dev)
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if (ast->chip == AST1180) {
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/* TODO 1180 */
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} else {
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ch = ast_io_read8(ast, 0x43);
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ch = ast_io_read8(ast, AST_IO_VGA_ENABLE_PORT);
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if (ch) {
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ast_open_key(ast);
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ch = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff);
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@ -61,7 +66,6 @@ ast_is_vga_enabled(struct drm_device *dev)
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}
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return 0;
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}
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#endif
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static const u8 extreginfo[] = { 0x0f, 0x04, 0x1c, 0xff };
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static const u8 extreginfo_ast2300a0[] = { 0x0f, 0x04, 0x1c, 0xff };
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@ -371,6 +375,7 @@ void ast_post_gpu(struct drm_device *dev)
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pci_write_config_dword(ast->dev->pdev, 0x04, reg);
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ast_enable_vga(dev);
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ast_enable_mmio(dev);
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ast_open_key(ast);
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ast_set_def_ext_reg(dev);
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