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arm64: dts: meson-g12b-odroid-n2: enable DVFS

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Enable DVFS for the Odroid-N2 by setting the clock, OPP and supply
for each cores of each CPU clusters.

The first cluster uses the "VDDCPU_B" power supply, and the second
cluster uses the "VDDCPU_A" power supply.

Each power supply can achieve 0.73V to 1.01V using 2 distinct PWM
outputs clocked at 800KHz with an inverse duty-cycle.

DVFS has been tested by running the arm64 cpuburn at [1] and cycling
between all the possible cpufreq translations of each cluster and
checking the final frequency using the clock-measurer, script at [2].

[1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S
[2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f

Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit is contained in:
Neil Armstrong 2019-07-29 15:26:22 +02:00 committed by Kevin Hilman
parent c6d29c66e5
commit d14734a04a
1 changed files with 96 additions and 0 deletions
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96
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
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@ -115,6 +115,44 @@
/* FIXME: actually controlled by VDDCPU_B_EN */
};
vddcpu_a: regulator-vddcpu-a {
/*
* MP8756GD Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU_A";
regulator-min-microvolt = <721000>;
regulator-max-microvolt = <1022000>;
vin-supply = <&main_12v>;
pwms = <&pwm_ab 0 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vddcpu_b: regulator-vddcpu-b {
/*
* Silergy SY8120B1ABC Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU_B";
regulator-min-microvolt = <721000>;
regulator-max-microvolt = <1022000>;
vin-supply = <&main_12v>;
pwms = <&pwm_AO_cd 1 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
hub_5v: regulator-hub_5v {
compatible = "regulator-fixed";
regulator-name = "HUB_5V";
@ -246,6 +284,48 @@
status = "okay";
};
&cpu0 {
cpu-supply = <&vddcpu_b>;
operating-points-v2 = <&cpu_opp_table_0>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu1 {
cpu-supply = <&vddcpu_b>;
operating-points-v2 = <&cpu_opp_table_0>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu100 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&cpu101 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&cpu102 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&cpu103 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&ext_mdio {
external_phy: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
@ -317,6 +397,22 @@
pinctrl-names = "default";
};
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
/* SD card */
&sd_emmc_b {
status = "okay";