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Our usual bunch of patches:

Browse Source 
- Some work on the BPi M2-Berry to support various devices
   - Convert some bindings to a schema, and a lot of fixes reported by
     the schemas we introduced.
   - A few other fixes here and there
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Merge tag 'sunxi-dt-for-5.3-201906210807' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

Our usual bunch of patches:
  - Some work on the BPi M2-Berry to support various devices
  - Convert some bindings to a schema, and a lot of fixes reported by
    the schemas we introduced.
  - A few other fixes here and there

* tag 'sunxi-dt-for-5.3-201906210807' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (21 commits)
  dt-bindings: pwm: Convert Allwinner PWM to a schema
  ARM: dts: sun8i: r40: Change the RTC compatible
  ARM: dts: sun8i: v3s: Add external crystals accuracy
  ARM: dts: sun8i: v3s: Fix the RTC node
  ARM: dts: sun6i: Add external crystals accuracy
  ARM: dts: sun6i: Fix RTC node
  ARM: dts: sun8i: a83t: Add device node for CSI (Camera Sensor Interface)
  ARM: dts: gr8-evb: Fix RTC vendor
  ARM: dts: sun7i: icnova-swac: Fix the model vendor
  ARM: dts: sun8i: a711: Change LRADC node names to avoid warnings
  ARM: dts: sun7i: olimex-lime2: Enable ac and power supplies
  ARM: dts: sun6i: Add default address and size cells for SPI
  ARM: dts: sun8i-h3: Fix wifi in Beelink X2 DT
  dt-bindings: bus: Convert Allwinner RSB to a schema
  ARM: dts: sun8i: r40: bananapi-m2-ultra: Remove regulator-always-on
  ARM: dts: sun8i: v40: bananapi-m2-berry: Add Bluetooth device node
  ARM: dts: sun8i: v40: bananapi-m2-berry: Enable AHCI
  ARM: dts: sun8i: v40: bananapi-m2-berry: Enable HDMI output
  ARM: dts: sun8i: v40: bananapi-m2-berry: Enable GMAC ethernet controller
  ARM: dts: sun8i: v40: bananapi-m2-berry: Add GPIO pin-bank regulator supplies
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-06-25 04:40:52 -07:00
commit d12a73cf3a
16 changed files with 341 additions and 89 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/arm/sunxi.yaml
View File

@ -263,7 +263,7 @@ properties:
- description: ICNova A20 SWAC
items:
- const: swac,icnova-a20-swac
- const: incircuit,icnova-a20-swac
- const: incircuit,icnova-a20
- const: allwinner,sun7i-a20

79
Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml Normal file
View File

@ -0,0 +1,79 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/allwinner,sun8i-a23-rsb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A23 RSB Device Tree Bindings
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <maxime.ripard@bootlin.com>
properties:
"#address-cells":
const: 1
"#size-cells":
const: 0
compatible:
oneOf:
- const: allwinner,sun8i-a23-rsb
- items:
- const: allwinner,sun8i-a83t-rsb
- const: allwinner,sun8i-a23-rsb
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
resets:
maxItems: 1
clock-frequency:
minimum: 1
maximum: 20000000
patternProperties:
"^.*@[0-9a-fA-F]+$":
properties:
reg:
maxItems: 1
required:
- reg
required:
- compatible
- reg
- interrupts
- clocks
- resets
examples:
- |
rsb@1f03400 {
compatible = "allwinner,sun8i-a23-rsb";
reg = <0x01f03400 0x400>;
interrupts = <0 39 4>;
clocks = <&apb0_gates 3>;
clock-frequency = <3000000>;
resets = <&apb0_rst 3>;
#address-cells = <1>;
#size-cells = <0>;
pmic@3e3 {
compatible = "...";
reg = <0x3e3>;
/* ... */
};
};
additionalProperties: false

47
Documentation/devicetree/bindings/bus/sunxi-rsb.txt
View File

@ -1,47 +0,0 @@
Allwinner Reduced Serial Bus (RSB) controller
The RSB controller found on later Allwinner SoCs is an SMBus like 2 wire
serial bus with 1 master and up to 15 slaves. It is represented by a node
for the controller itself, and child nodes representing the slave devices.
Required properties :
- reg : Offset and length of the register set for the controller.
- compatible : Shall be "allwinner,sun8i-a23-rsb".
- interrupts : The interrupt line associated to the RSB controller.
- clocks : The gate clk associated to the RSB controller.
- resets : The reset line associated to the RSB controller.
- #address-cells : shall be 1
- #size-cells : shall be 0
Optional properties :
- clock-frequency : Desired RSB bus clock frequency in Hz. Maximum is 20MHz.
If not set this defaults to 3MHz.
Child nodes:
An RSB controller node can contain zero or more child nodes representing
slave devices on the bus. Child 'reg' properties should contain the slave
device's hardware address. The hardware address is hardwired in the device,
which can normally be found in the datasheet.
Example:
rsb@1f03400 {
compatible = "allwinner,sun8i-a23-rsb";
reg = <0x01f03400 0x400>;
interrupts = <0 39 4>;
clocks = <&apb0_gates 3>;
clock-frequency = <3000000>;
resets = <&apb0_rst 3>;
#address-cells = <1>;
#size-cells = <0>;
pmic@3e3 {
compatible = "...";
reg = <0x3e3>;
/* ... */
};
};

57
Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml Normal file
View File

@ -0,0 +1,57 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/allwinner,sun4i-a10-pwm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 PWM Device Tree Bindings
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <maxime.ripard@bootlin.com>
properties:
"#pwm-cells":
const: 3
compatible:
oneOf:
- const: allwinner,sun4i-a10-pwm
- const: allwinner,sun5i-a10s-pwm
- const: allwinner,sun5i-a13-pwm
- const: allwinner,sun7i-a20-pwm
- const: allwinner,sun8i-h3-pwm
- items:
- const: allwinner,sun8i-a83t-pwm
- const: allwinner,sun8i-h3-pwm
- items:
- const: allwinner,sun50i-a64-pwm
- const: allwinner,sun5i-a13-pwm
- items:
- const: allwinner,sun50i-h5-pwm
- const: allwinner,sun5i-a13-pwm
reg:
maxItems: 1
clocks:
maxItems: 1
required:
- "#pwm-cells"
- compatible
- reg
- clocks
additionalProperties: false
examples:
- |
pwm: pwm@1c20e00 {
compatible = "allwinner,sun7i-a20-pwm";
reg = <0x01c20e00 0xc>;
clocks = <&osc24M>;
#pwm-cells = <3>;
};
...

24
Documentation/devicetree/bindings/pwm/pwm-sun4i.txt
View File

@ -1,24 +0,0 @@
Allwinner sun4i and sun7i SoC PWM controller
Required properties:
- compatible: should be one of:
- "allwinner,sun4i-a10-pwm"
- "allwinner,sun5i-a10s-pwm"
- "allwinner,sun5i-a13-pwm"
- "allwinner,sun7i-a20-pwm"
- "allwinner,sun8i-h3-pwm"
- "allwinner,sun50i-a64-pwm", "allwinner,sun5i-a13-pwm"
- "allwinner,sun50i-h5-pwm", "allwinner,sun5i-a13-pwm"
- reg: physical base address and length of the controller's registers
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
the cells format.
- clocks: From common clock binding, handle to the parent clock.
Example:
pwm: pwm@1c20e00 {
compatible = "allwinner,sun7i-a20-pwm";
reg = <0x01c20e00 0xc>;
clocks = <&osc24M>;
#pwm-cells = <3>;
};

2
arch/arm/boot/dts/sun5i-gr8-evb.dts
View File

@ -150,7 +150,7 @@
};
pcf8563: rtc@51 {
compatible = "phg,pcf8563";
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};

25
arch/arm/boot/dts/sun6i-a31.dtsi
View File

@ -216,6 +216,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-accuracy = <50000>;
clock-output-names = "osc24M";
};
@ -223,7 +224,8 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "osc32k";
clock-accuracy = <50000>;
clock-output-names = "ext_osc32k";
};
/*
@ -588,7 +590,7 @@
ccu: clock@1c20000 {
compatible = "allwinner,sun6i-a31-ccu";
reg = <0x01c20000 0x400>;
clocks = <&osc24M>, <&osc32k>;
clocks = <&osc24M>, <&rtc 0>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
@ -601,7 +603,7 @@
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&osc32k>;
clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&rtc 0>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
@ -987,6 +989,8 @@
dma-names = "rx", "tx";
resets = <&ccu RST_AHB1_SPI0>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi1: spi@1c69000 {
@ -999,6 +1003,8 @@
dma-names = "rx", "tx";
resets = <&ccu RST_AHB1_SPI1>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi2: spi@1c6a000 {
@ -1011,6 +1017,8 @@
dma-names = "rx", "tx";
resets = <&ccu RST_AHB1_SPI2>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi3: spi@1c6b000 {
@ -1023,6 +1031,8 @@
dma-names = "rx", "tx";
resets = <&ccu RST_AHB1_SPI3>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
gic: interrupt-controller@1c81000 {
@ -1279,10 +1289,13 @@
};
rtc: rtc@1f00000 {
#clock-cells = <1>;
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc32k>;
clock-output-names = "osc32k";
};
nmi_intc: interrupt-controller@1f00c00 {
@ -1300,7 +1313,7 @@
ar100: ar100_clk {
compatible = "allwinner,sun6i-a31-ar100-clk";
#clock-cells = <0>;
clocks = <&osc32k>, <&osc24M>,
clocks = <&rtc 0>, <&osc24M>,
<&ccu CLK_PLL_PERIPH>,
<&ccu CLK_PLL_PERIPH>;
clock-output-names = "ar100";
@ -1335,7 +1348,7 @@
ir_clk: ir_clk {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-mod0-clk";
clocks = <&osc32k>, <&osc24M>;
clocks = <&rtc 0>, <&osc24M>;
clock-output-names = "ir";
};
@ -1365,7 +1378,7 @@
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
clock-names = "apb", "hosc", "losc";
resets = <&apb0_rst 0>;
gpio-controller;

3
arch/arm/boot/dts/sun7i-a20-icnova-swac.dts
View File

@ -49,7 +49,8 @@
/ {
model = "ICnova-A20 SWAC";
compatible = "swac,icnova-a20-swac", "incircuit,icnova-a20", "allwinner,sun7i-a20";
compatible = "incircuit,icnova-a20-swac", "incircuit,icnova-a20",
"allwinner,sun7i-a20";
aliases {
serial0 = &uart0;

8
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
View File

@ -194,6 +194,14 @@
#include "axp209.dtsi"
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;

4
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
View File

@ -224,14 +224,14 @@
vref-supply = <&reg_aldo2>;
status = "okay";
button@210 {
button-210 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
channel = <0>;
voltage = <210000>;
};
button@410 {
button-410 {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
channel = <0>;

29
arch/arm/boot/dts/sun8i-a83t.dtsi
View File

@ -679,6 +679,20 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
/omit-if-no-ref/
csi_8bit_parallel_pins: csi-8bit-parallel-pins {
pins = "PE0", "PE2", "PE3", "PE6", "PE7",
"PE8", "PE9", "PE10", "PE11",
"PE12", "PE13";
function = "csi";
};
/omit-if-no-ref/
csi_mclk_pin: csi-mclk-pin {
pins = "PE1";
function = "csi";
};
emac_rgmii_pins: emac-rgmii-pins {
pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
"PD11", "PD12", "PD13", "PD14", "PD18",
@ -997,6 +1011,21 @@
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
};
csi: camera@1cb0000 {
compatible = "allwinner,sun8i-a83t-csi";
reg = <0x01cb0000 0x1000>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CSI>,
<&ccu CLK_CSI_SCLK>,
<&ccu CLK_DRAM_CSI>;
clock-names = "bus", "mod", "ram";
resets = <&ccu RST_BUS_CSI>;
status = "disabled";
csi_in: port {
};
};
hdmi: hdmi@1ee0000 {
compatible = "allwinner,sun8i-a83t-dw-hdmi";
reg = <0x01ee0000 0x10000>;

4
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
View File

@ -90,6 +90,8 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc 1>;
clock-names = "ext_clock";
};
sound_spdif {
@ -155,6 +157,8 @@
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";

7
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
View File

@ -201,10 +201,15 @@
&pio {
pinctrl-names = "default";
pinctrl-0 = <&clk_out_a_pin>;
vcc-pa-supply = <&reg_aldo2>;
vcc-pc-supply = <&reg_dcdc1>;
vcc-pd-supply = <&reg_dcdc1>;
vcc-pe-supply = <&reg_eldo1>;
vcc-pf-supply = <&reg_dcdc1>;
vcc-pg-supply = <&reg_dldo1>;
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-name = "vcc-pa";

3
arch/arm/boot/dts/sun8i-r40.dtsi
View File

@ -318,8 +318,7 @@
};
rtc: rtc@1c20400 {
compatible = "allwinner,sun8i-r40-rtc",
"allwinner,sun8i-h3-rtc";
compatible = "allwinner,sun8i-r40-rtc";
reg = <0x01c20400 0x400>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clock-output-names = "osc32k", "osc32k-out";

13
arch/arm/boot/dts/sun8i-v3s.dtsi
View File

@ -84,6 +84,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-accuracy = <50000>;
clock-output-names = "osc24M";
};
@ -91,7 +92,8 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "osc32k";
clock-accuracy = <50000>;
clock-output-names = "ext-osc32k";
};
};
@ -264,17 +266,20 @@
ccu: clock@1c20000 {
compatible = "allwinner,sun8i-v3s-ccu";
reg = <0x01c20000 0x400>;
clocks = <&osc24M>, <&osc32k>;
clocks = <&osc24M>, <&rtc 0>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
};
rtc: rtc@1c20400 {
compatible = "allwinner,sun6i-a31-rtc";
#clock-cells = <1>;
compatible = "allwinner,sun8i-v3-rtc";
reg = <0x01c20400 0x54>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc32k>;
clock-output-names = "osc32k", "osc32k-out";
};
pio: pinctrl@1c20800 {
@ -282,7 +287,7 @@
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;

123
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
View File

@ -50,6 +50,7 @@
compatible = "sinovoip,bpi-m2-berry", "allwinner,sun8i-r40";
aliases {
ethernet0 = &gmac;
serial0 = &uart0;
};
@ -57,6 +58,17 @@
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
@ -84,14 +96,52 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
clocks = <&ccu CLK_OUTA>;
clock-names = "ext_clock";
};
};
&ahci {
ahci-supply = <&reg_dldo4>;
phy-supply = <&reg_eldo3>;
status = "okay";
};
&de {
status = "okay";
};
&ehci1 {
/* Terminus Tech FE 1.1s 4-port USB 2.0 hub here */
status = "okay";
};
&gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii";
phy-supply = <&reg_dc1sw>;
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&i2c0 {
status = "okay";
@ -123,6 +173,23 @@
status = "okay";
};
&pio {
pinctrl-names = "default";
pinctrl-0 = <&clk_out_a_pin>;
vcc-pa-supply = <&reg_aldo2>;
vcc-pc-supply = <&reg_dcdc1>;
vcc-pd-supply = <&reg_dcdc1>;
vcc-pe-supply = <&reg_eldo1>;
vcc-pf-supply = <&reg_dcdc1>;
vcc-pg-supply = <&reg_dldo1>;
};
&reg_aldo2 {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-name = "vcc-pa";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <2700000>;
@ -130,6 +197,12 @@
regulator-name = "avcc";
};
&reg_dc1sw {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-gmac-phy";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
@ -164,18 +237,68 @@
regulator-name = "vcc-wifi-io";
};
/*
* Our WiFi chip needs both DLDO2 and DLDO3 to be powered at the same
* time, with the two being in sync, to be able to meet maximum power
* consumption during transmits. Since this is not really supported
* right now, just use the two as always on, and we will fix it later.
*/
&reg_dldo2 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi";
};
&reg_dldo3 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-2";
};
&reg_dldo4 {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-name = "vdd2v5-sata";
};
&reg_eldo3 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vdd1v2-sata";
};
&tcon_tv0 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
clocks = <&ccu CLK_OUTA>;
clock-names = "lpo";
vbat-supply = <&reg_dldo2>;
vddio-supply = <&reg_dldo1>;
device-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
/* TODO host wake line connected to PMIC GPIO pins */
shutdown-gpios = <&pio 7 12 GPIO_ACTIVE_HIGH>; /* PH12 */
max-speed = <1500000>;
};
};
&usbphy {
usb1_vbus-supply = <&reg_vcc5v0>;
status = "okay";