renegade-project/linux-next
2
0
Fork 0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-20 03:04:01 +08:00
Code

ARM: at91: add ioremap_registers entry point to soc setup

Browse Source 
this will allow to ioremap the register of the PIT, PMC and others
and make the code soc independent

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This commit is contained in:
Jean-Christophe PLAGNIOL-VILLARD 2011-10-14 01:17:18 +08:00
parent eab5fd67d6
commit cfa5a1fe7e
9 changed files with 38 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/arm/mach-at91/at91cap9.c
View File

@ -333,6 +333,10 @@ static void __init at91cap9_map_io(void)
at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
}
static void __init at91cap9_ioremap_registers(void)
{
}
static void __init at91cap9_initialize(void)
{
at91_arch_reset = at91cap9_reset;
@ -394,6 +398,7 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
struct at91_init_soc __initdata at91cap9_soc = {
.map_io = at91cap9_map_io,
.default_irq_priority = at91cap9_default_irq_priority,
.ioremap_registers = at91cap9_ioremap_registers,
.register_clocks = at91cap9_register_clocks,
.init = at91cap9_initialize,
};

5
arch/arm/mach-at91/at91rm9200.c
View File

@ -307,6 +307,10 @@ static void __init at91rm9200_map_io(void)
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
}
static void __init at91rm9200_ioremap_registers(void)
{
}
static void __init at91rm9200_initialize(void)
{
at91_arch_reset = at91rm9200_reset;
@ -366,6 +370,7 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
struct at91_init_soc __initdata at91rm9200_soc = {
.map_io = at91rm9200_map_io,
.default_irq_priority = at91rm9200_default_irq_priority,
.ioremap_registers = at91rm9200_ioremap_registers,
.register_clocks = at91rm9200_register_clocks,
.init = at91rm9200_initialize,
};

5
arch/arm/mach-at91/at91sam9260.c
View File

@ -325,6 +325,10 @@ static void __init at91sam9260_map_io(void)
}
}
static void __init at91sam9260_ioremap_registers(void)
{
}
static void __init at91sam9260_initialize(void)
{
at91_arch_reset = at91sam9_alt_reset;
@ -381,6 +385,7 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
struct at91_init_soc __initdata at91sam9260_soc = {
.map_io = at91sam9260_map_io,
.default_irq_priority = at91sam9260_default_irq_priority,
.ioremap_registers = at91sam9260_ioremap_registers,
.register_clocks = at91sam9260_register_clocks,
.init = at91sam9260_initialize,
};

5
arch/arm/mach-at91/at91sam9261.c
View File

@ -285,6 +285,10 @@ static void __init at91sam9261_map_io(void)
at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
}
static void __init at91sam9261_ioremap_registers(void)
{
}
static void __init at91sam9261_initialize(void)
{
at91_arch_reset = at91sam9_alt_reset;
@ -341,6 +345,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
struct at91_init_soc __initdata at91sam9261_soc = {
.map_io = at91sam9261_map_io,
.default_irq_priority = at91sam9261_default_irq_priority,
.ioremap_registers = at91sam9261_ioremap_registers,
.register_clocks = at91sam9261_register_clocks,
.init = at91sam9261_initialize,
};

5
arch/arm/mach-at91/at91sam9263.c
View File

@ -303,6 +303,10 @@ static void __init at91sam9263_map_io(void)
at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
}
static void __init at91sam9263_ioremap_registers(void)
{
}
static void __init at91sam9263_initialize(void)
{
at91_arch_reset = at91sam9_alt_reset;
@ -358,6 +362,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
struct at91_init_soc __initdata at91sam9263_soc = {
.map_io = at91sam9263_map_io,
.default_irq_priority = at91sam9263_default_irq_priority,
.ioremap_registers = at91sam9263_ioremap_registers,
.register_clocks = at91sam9263_register_clocks,
.init = at91sam9263_initialize,
};

5
arch/arm/mach-at91/at91sam9g45.c
View File

@ -338,6 +338,10 @@ static void __init at91sam9g45_map_io(void)
init_consistent_dma_size(SZ_4M);
}
static void __init at91sam9g45_ioremap_registers(void)
{
}
static void __init at91sam9g45_initialize(void)
{
at91_arch_reset = at91sam9g45_reset;
@ -393,6 +397,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
struct at91_init_soc __initdata at91sam9g45_soc = {
.map_io = at91sam9g45_map_io,
.default_irq_priority = at91sam9g45_default_irq_priority,
.ioremap_registers = at91sam9g45_ioremap_registers,
.register_clocks = at91sam9g45_register_clocks,
.init = at91sam9g45_initialize,
};

5
arch/arm/mach-at91/at91sam9rl.c
View File

@ -290,6 +290,10 @@ static void __init at91sam9rl_map_io(void)
at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size);
}
static void __init at91sam9rl_ioremap_registers(void)
{
}
static void __init at91sam9rl_initialize(void)
{
at91_arch_reset = at91sam9_alt_reset;
@ -345,6 +349,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
struct at91_init_soc __initdata at91sam9rl_soc = {
.map_io = at91sam9rl_map_io,
.default_irq_priority = at91sam9rl_default_irq_priority,
.ioremap_registers = at91sam9rl_ioremap_registers,
.register_clocks = at91sam9rl_register_clocks,
.init = at91sam9rl_initialize,
};

2
arch/arm/mach-at91/setup.c
View File

@ -287,6 +287,8 @@ void __init at91_map_io(void)
void __init at91_initialize(unsigned long main_clock)
{
at91_boot_soc.ioremap_registers();
/* Init clock subsystem */
at91_clock_init(main_clock);

1
arch/arm/mach-at91/soc.h
View File

@ -7,6 +7,7 @@
struct at91_init_soc {
unsigned int *default_irq_priority;
void (*map_io)(void);
void (*ioremap_registers)(void);
void (*register_clocks)(void);
void (*init)(void);
};