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mfd: cros_ec: Update ACPI interface definition
Add more fields and improve API when EC presents data through ACPI memory space. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Gwendal Grignou
Lee Jones
parent
9e81656063
commit
ce86c87d73
@ -83,13 +83,15 @@
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/* Unused 0x28 - 0x2f */
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#define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */
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/* Unused 0x31 - 0x33 */
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#define EC_MEMMAP_HOST_EVENTS 0x34 /* 32 bits */
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/* Reserve 0x38 - 0x3f for additional host event-related stuff */
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/* Battery values are all 32 bits */
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#define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */
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/* Battery values are all 32 bits, unless otherwise noted. */
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#define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */
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#define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */
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#define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */
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#define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */
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#define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */
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#define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */
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#define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */
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/* Unused 0x4f */
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#define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */
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#define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */
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#define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */
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@ -103,10 +105,19 @@
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/* Unused 0x84 - 0x8f */
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#define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/
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/* Unused 0x91 */
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#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometer data 0x92 - 0x9f */
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#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */
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/* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */
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/* 0x94 - 0x99: 1st Accelerometer */
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/* 0x9a - 0x9f: 2nd Accelerometer */
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#define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */
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/* Unused 0xa6 - 0xfe (remember, 0xff is NOT part of the memmap region) */
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/* Unused 0xa6 - 0xdf */
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/*
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* ACPI is unable to access memory mapped data at or above this offset due to
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* limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe
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* which might be needed by ACPI.
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*/
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#define EC_MEMMAP_NO_ACPI 0xe0
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/* Define the format of the accelerometer mapped memory status byte. */
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#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
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@ -155,6 +166,8 @@
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#define EC_BATT_FLAG_DISCHARGING 0x04
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#define EC_BATT_FLAG_CHARGING 0x08
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#define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
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/* Set if some of the static/dynamic data is invalid (or outdated). */
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#define EC_BATT_FLAG_INVALID_DATA 0x20
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/* Switch flags at EC_MEMMAP_SWITCHES */
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#define EC_SWITCH_LID_OPEN 0x01
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@ -180,12 +193,200 @@
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#define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */
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#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */
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/*****************************************************************************/
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/*
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* ACPI commands
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*
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* These are valid ONLY on the ACPI command/data port.
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*/
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/*
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* ACPI Read Embedded Controller
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*
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* This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
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*
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* Use the following sequence:
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*
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* - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
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* - Wait for EC_LPC_CMDR_PENDING bit to clear
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* - Write address to EC_LPC_ADDR_ACPI_DATA
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* - Wait for EC_LPC_CMDR_DATA bit to set
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* - Read value from EC_LPC_ADDR_ACPI_DATA
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*/
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#define EC_CMD_ACPI_READ 0x0080
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/*
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* ACPI Write Embedded Controller
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*
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* This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
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*
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* Use the following sequence:
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*
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* - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
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* - Wait for EC_LPC_CMDR_PENDING bit to clear
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* - Write address to EC_LPC_ADDR_ACPI_DATA
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* - Wait for EC_LPC_CMDR_PENDING bit to clear
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* - Write value to EC_LPC_ADDR_ACPI_DATA
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*/
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#define EC_CMD_ACPI_WRITE 0x0081
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/*
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* ACPI Burst Enable Embedded Controller
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*
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* This enables burst mode on the EC to allow the host to issue several
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* commands back-to-back. While in this mode, writes to mapped multi-byte
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* data are locked out to ensure data consistency.
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*/
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#define EC_CMD_ACPI_BURST_ENABLE 0x0082
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/*
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* ACPI Burst Disable Embedded Controller
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*
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* This disables burst mode on the EC and stops preventing EC writes to mapped
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* multi-byte data.
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*/
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#define EC_CMD_ACPI_BURST_DISABLE 0x0083
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/*
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* ACPI Query Embedded Controller
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*
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* This clears the lowest-order bit in the currently pending host events, and
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* sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
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* event 0x80000000 = 32), or 0 if no event was pending.
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*/
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#define EC_CMD_ACPI_QUERY_EVENT 0x0084
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/* Valid addresses in ACPI memory space, for read/write commands */
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/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
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#define EC_ACPI_MEM_VERSION 0x00
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/*
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* Test location; writing value here updates test compliment byte to (0xff -
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* value).
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*/
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#define EC_ACPI_MEM_TEST 0x01
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/* Test compliment; writes here are ignored. */
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#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
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/* Keyboard backlight brightness percent (0 - 100) */
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#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
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/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
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#define EC_ACPI_MEM_FAN_DUTY 0x04
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/*
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* DPTF temp thresholds. Any of the EC's temp sensors can have up to two
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* independent thresholds attached to them. The current value of the ID
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* register determines which sensor is affected by the THRESHOLD and COMMIT
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* registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
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* as the memory-mapped sensors. The COMMIT register applies those settings.
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*
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* The spec does not mandate any way to read back the threshold settings
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* themselves, but when a threshold is crossed the AP needs a way to determine
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* which sensor(s) are responsible. Each reading of the ID register clears and
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* returns one sensor ID that has crossed one of its threshold (in either
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* direction) since the last read. A value of 0xFF means "no new thresholds
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* have tripped". Setting or enabling the thresholds for a sensor will clear
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* the unread event count for that sensor.
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*/
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#define EC_ACPI_MEM_TEMP_ID 0x05
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#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
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#define EC_ACPI_MEM_TEMP_COMMIT 0x07
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/*
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* Here are the bits for the COMMIT register:
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* bit 0 selects the threshold index for the chosen sensor (0/1)
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* bit 1 enables/disables the selected threshold (0 = off, 1 = on)
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* Each write to the commit register affects one threshold.
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*/
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#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0)
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#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1)
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/*
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* Example:
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*
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* Set the thresholds for sensor 2 to 50 C and 60 C:
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* write 2 to [0x05] -- select temp sensor 2
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* write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
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* write 0x2 to [0x07] -- enable threshold 0 with this value
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* write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
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* write 0x3 to [0x07] -- enable threshold 1 with this value
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*
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* Disable the 60 C threshold, leaving the 50 C threshold unchanged:
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* write 2 to [0x05] -- select temp sensor 2
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* write 0x1 to [0x07] -- disable threshold 1
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*/
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/* DPTF battery charging current limit */
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#define EC_ACPI_MEM_CHARGING_LIMIT 0x08
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/* Charging limit is specified in 64 mA steps */
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#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
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/* Value to disable DPTF battery charging limit */
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#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
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/*
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* Report device orientation
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* Bits Definition
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* 3:1 Device DPTF Profile Number (DDPN)
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* 0 = Reserved for backward compatibility (indicates no valid
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* profile number. Host should fall back to using TBMD).
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* 1..7 = DPTF Profile number to indicate to host which table needs
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* to be loaded.
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* 0 Tablet Mode Device Indicator (TBMD)
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*/
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#define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09
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#define EC_ACPI_MEM_TBMD_SHIFT 0
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#define EC_ACPI_MEM_TBMD_MASK 0x1
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#define EC_ACPI_MEM_DDPN_SHIFT 1
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#define EC_ACPI_MEM_DDPN_MASK 0x7
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/*
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* Report device features. Uses the same format as the host command, except:
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*
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* bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set
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* of features", which is of limited interest when the system is already
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* interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since
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* these are supported, it defaults to 0.
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* This allows detecting the presence of this field since older versions of
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* the EC codebase would simply return 0xff to that unknown address. Check
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* FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits
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* are valid.
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*/
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#define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a
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#define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b
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#define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c
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#define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d
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#define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e
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#define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f
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#define EC_ACPI_MEM_DEVICE_FEATURES6 0x10
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#define EC_ACPI_MEM_DEVICE_FEATURES7 0x11
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#define EC_ACPI_MEM_BATTERY_INDEX 0x12
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/*
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* USB Port Power. Each bit indicates whether the corresponding USB ports' power
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* is enabled (1) or disabled (0).
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* bit 0 USB port ID 0
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* ...
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* bit 7 USB port ID 7
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*/
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#define EC_ACPI_MEM_USB_PORT_POWER 0x13
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/*
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* ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data
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* is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2.
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*/
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#define EC_ACPI_MEM_MAPPED_BEGIN 0x20
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#define EC_ACPI_MEM_MAPPED_SIZE 0xe0
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/* Current version of ACPI memory address space */
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#define EC_ACPI_MEM_VERSION_CURRENT 2
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/*
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* This header file is used in coreboot both in C and ACPI code. The ACPI code
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* is pre-processed to handle constants but the ASL compiler is unable to
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* handle actual C code so keep it separate.
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*/
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#ifndef __ACPI__
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/*
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* Attributes for EC request and response packets. Just defining __packed
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@ -238,7 +439,7 @@
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#define EC_LPC_STATUS_PROCESSING 0x04
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/* Last write to EC was a command, not data */
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#define EC_LPC_STATUS_LAST_CMD 0x08
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/* EC is in burst mode. Unsupported by Chrome EC, so this bit is never set */
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/* EC is in burst mode */
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#define EC_LPC_STATUS_BURST_MODE 0x10
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/* SCI event is pending (requesting SCI query) */
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#define EC_LPC_STATUS_SCI_PENDING 0x20
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@ -2323,6 +2524,8 @@ struct ec_response_temp_sensor_get_info {
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/*****************************************************************************/
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/* Host event commands */
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/* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */
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/*
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* Host event mask params and response structures, shared by all of the host
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* event commands below.
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@ -2348,6 +2551,86 @@ struct ec_response_host_event_mask {
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#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E
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#define EC_CMD_HOST_EVENT_CLEAR_B 0x008F
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/*
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* Unified host event programming interface - Should be used by newer versions
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* of BIOS/OS to program host events and masks
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*/
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struct ec_params_host_event {
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/* Action requested by host - one of enum ec_host_event_action. */
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uint8_t action;
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/*
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* Mask type that the host requested the action on - one of
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* enum ec_host_event_mask_type.
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*/
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uint8_t mask_type;
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/* Set to 0, ignore on read */
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uint16_t reserved;
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/* Value to be used in case of set operations. */
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uint64_t value;
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} __ec_align4;
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/*
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* Response structure returned by EC_CMD_HOST_EVENT.
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* Update the value on a GET request. Set to 0 on GET/CLEAR
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*/
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struct ec_response_host_event {
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/* Mask value in case of get operation */
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uint64_t value;
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} __ec_align4;
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enum ec_host_event_action {
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/*
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* params.value is ignored. Value of mask_type populated
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* in response.value
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*/
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EC_HOST_EVENT_GET,
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/* Bits in params.value are set */
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EC_HOST_EVENT_SET,
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/* Bits in params.value are cleared */
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EC_HOST_EVENT_CLEAR,
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};
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enum ec_host_event_mask_type {
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/* Main host event copy */
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EC_HOST_EVENT_MAIN,
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/* Copy B of host events */
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EC_HOST_EVENT_B,
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/* SCI Mask */
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EC_HOST_EVENT_SCI_MASK,
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/* SMI Mask */
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EC_HOST_EVENT_SMI_MASK,
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/* Mask of events that should be always reported in hostevents */
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EC_HOST_EVENT_ALWAYS_REPORT_MASK,
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/* Active wake mask */
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EC_HOST_EVENT_ACTIVE_WAKE_MASK,
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/* Lazy wake mask for S0ix */
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EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX,
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/* Lazy wake mask for S3 */
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EC_HOST_EVENT_LAZY_WAKE_MASK_S3,
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/* Lazy wake mask for S5 */
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EC_HOST_EVENT_LAZY_WAKE_MASK_S5,
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};
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#define EC_CMD_HOST_EVENT 0x00A4
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/*****************************************************************************/
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/* Switch commands */
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@ -3056,122 +3339,6 @@ struct ec_params_reboot_ec {
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*/
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#define EC_CMD_GET_PANIC_INFO 0x00D3
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/*****************************************************************************/
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/*
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* ACPI commands
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*
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* These are valid ONLY on the ACPI command/data port.
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*/
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/*
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* ACPI Read Embedded Controller
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*
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* This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
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*
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* Use the following sequence:
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*
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* - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
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* - Wait for EC_LPC_CMDR_PENDING bit to clear
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* - Write address to EC_LPC_ADDR_ACPI_DATA
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* - Wait for EC_LPC_CMDR_DATA bit to set
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* - Read value from EC_LPC_ADDR_ACPI_DATA
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*/
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#define EC_CMD_ACPI_READ 0x80
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/*
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* ACPI Write Embedded Controller
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*
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* This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
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*
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* Use the following sequence:
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*
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* - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
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* - Wait for EC_LPC_CMDR_PENDING bit to clear
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* - Write address to EC_LPC_ADDR_ACPI_DATA
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* - Wait for EC_LPC_CMDR_PENDING bit to clear
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* - Write value to EC_LPC_ADDR_ACPI_DATA
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*/
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#define EC_CMD_ACPI_WRITE 0x81
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/*
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* ACPI Query Embedded Controller
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*
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* This clears the lowest-order bit in the currently pending host events, and
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* sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
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* event 0x80000000 = 32), or 0 if no event was pending.
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*/
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#define EC_CMD_ACPI_QUERY_EVENT 0x84
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/* Valid addresses in ACPI memory space, for read/write commands */
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/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
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#define EC_ACPI_MEM_VERSION 0x00
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/*
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* Test location; writing value here updates test compliment byte to (0xff -
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* value).
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*/
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#define EC_ACPI_MEM_TEST 0x01
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/* Test compliment; writes here are ignored. */
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#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
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/* Keyboard backlight brightness percent (0 - 100) */
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#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
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/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
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#define EC_ACPI_MEM_FAN_DUTY 0x04
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|
||||
/*
|
||||
* DPTF temp thresholds. Any of the EC's temp sensors can have up to two
|
||||
* independent thresholds attached to them. The current value of the ID
|
||||
* register determines which sensor is affected by the THRESHOLD and COMMIT
|
||||
* registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
|
||||
* as the memory-mapped sensors. The COMMIT register applies those settings.
|
||||
*
|
||||
* The spec does not mandate any way to read back the threshold settings
|
||||
* themselves, but when a threshold is crossed the AP needs a way to determine
|
||||
* which sensor(s) are responsible. Each reading of the ID register clears and
|
||||
* returns one sensor ID that has crossed one of its threshold (in either
|
||||
* direction) since the last read. A value of 0xFF means "no new thresholds
|
||||
* have tripped". Setting or enabling the thresholds for a sensor will clear
|
||||
* the unread event count for that sensor.
|
||||
*/
|
||||
#define EC_ACPI_MEM_TEMP_ID 0x05
|
||||
#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
|
||||
#define EC_ACPI_MEM_TEMP_COMMIT 0x07
|
||||
/*
|
||||
* Here are the bits for the COMMIT register:
|
||||
* bit 0 selects the threshold index for the chosen sensor (0/1)
|
||||
* bit 1 enables/disables the selected threshold (0 = off, 1 = on)
|
||||
* Each write to the commit register affects one threshold.
|
||||
*/
|
||||
#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0)
|
||||
#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1)
|
||||
/*
|
||||
* Example:
|
||||
*
|
||||
* Set the thresholds for sensor 2 to 50 C and 60 C:
|
||||
* write 2 to [0x05] -- select temp sensor 2
|
||||
* write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
|
||||
* write 0x2 to [0x07] -- enable threshold 0 with this value
|
||||
* write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
|
||||
* write 0x3 to [0x07] -- enable threshold 1 with this value
|
||||
*
|
||||
* Disable the 60 C threshold, leaving the 50 C threshold unchanged:
|
||||
* write 2 to [0x05] -- select temp sensor 2
|
||||
* write 0x1 to [0x07] -- disable threshold 1
|
||||
*/
|
||||
|
||||
/* DPTF battery charging current limit */
|
||||
#define EC_ACPI_MEM_CHARGING_LIMIT 0x08
|
||||
|
||||
/* Charging limit is specified in 64 mA steps */
|
||||
#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
|
||||
/* Value to disable DPTF battery charging limit */
|
||||
#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
|
||||
|
||||
/* Current version of ACPI memory address space */
|
||||
#define EC_ACPI_MEM_VERSION_CURRENT 1
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/*
|
||||
* HDMI CEC commands
|
||||
@ -3285,8 +3452,6 @@ enum mkbp_cec_event {
|
||||
*/
|
||||
#define EC_CMD_VERSION0 0x00DC
|
||||
|
||||
#endif /* !__ACPI__ */
|
||||
|
||||
/*****************************************************************************/
|
||||
/*
|
||||
* PD commands
|
||||
@ -3627,4 +3792,6 @@ struct ec_response_usb_pd_mux_info {
|
||||
#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1
|
||||
#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
|
||||
|
||||
|
||||
|
||||
#endif /* __CROS_EC_COMMANDS_H */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user