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gpio: brcmstb: Set endian flags for big-endian MIPS
Broadcom MIPS-based STB chips endianness is configured by boot strap, which also reverses all bus endianness (i.e., big-endian CPU + big endian bus ==> native endian I/O). Other architectures (e.g., ARM) either do not support big endian, or else leave I/O in little endian mode. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -409,6 +409,7 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
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int num_banks = 0;
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int err;
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static int gpio_base;
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unsigned long flags = 0;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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@ -438,6 +439,18 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
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if (brcmstb_gpio_sanity_check_banks(dev, np, res))
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return -EINVAL;
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/*
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* MIPS endianness is configured by boot strap, which also reverses all
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* bus endianness (i.e., big-endian CPU + big endian bus ==> native
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* endian I/O).
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*
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* Other architectures (e.g., ARM) either do not support big endian, or
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* else leave I/O in little endian mode.
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*/
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#if defined(CONFIG_MIPS) && defined(__BIG_ENDIAN)
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flags = BGPIOF_BIG_ENDIAN_BYTE_ORDER;
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#endif
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of_property_for_each_u32(np, "brcm,gpio-bank-widths", prop, p,
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bank_width) {
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struct brcmstb_gpio_bank *bank;
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@ -466,7 +479,7 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
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err = bgpio_init(gc, dev, 4,
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reg_base + GIO_DATA(bank->id),
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NULL, NULL, NULL,
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reg_base + GIO_IODIR(bank->id), 0);
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reg_base + GIO_IODIR(bank->id), flags);
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if (err) {
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dev_err(dev, "bgpio_init() failed\n");
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goto fail;
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