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dmaengine: apple-admac: Use {low,upp}er_32_bits() to split 64-bit address

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If CONFIG_PHYS_ADDR_T_64BIT is not set:

    drivers/dma/apple-admac.c: In function ‘admac_cyclic_write_one_desc’:
    drivers/dma/apple-admac.c:213:22: error: right shift count >= width of type [-Werror=shift-count-overflow]
      213 |  writel_relaxed(addr >> 32,       ad->base + REG_DESC_WRITE(channo));
          |                      ^~

Fix this by using the {low,upp}er_32_bits() helper macros to obtain the
address parts.

Reported-by: noreply@ellerman.id.au
Fixes: b127315d9a ("dmaengine: apple-admac: Add Apple ADMAC driver")
Acked-by: Martin Povišer <povik+lin@cutebit.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Link: https://lore.kernel.org/r/20220616141312.1953819-1-geert@linux-m68k.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Geert Uytterhoeven 2022-06-16 16:13:12 +02:00 committed by Vinod Koul
parent 81ce6f3dbb
commit ce4b461ba2
1 changed files with 4 additions and 4 deletions
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8
drivers/dma/apple-admac.c
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@ -209,10 +209,10 @@ static void admac_cyclic_write_one_desc(struct admac_data *ad, int channo,
dev_dbg(ad->dev, "ch%d descriptor: addr=0x%pad len=0x%zx flags=0x%lx\n",
channo, &addr, tx->period_len, FLAG_DESC_NOTIFY);
writel_relaxed(addr, ad->base + REG_DESC_WRITE(channo));
writel_relaxed(addr >> 32, ad->base + REG_DESC_WRITE(channo));
writel_relaxed(tx->period_len, ad->base + REG_DESC_WRITE(channo));
writel_relaxed(FLAG_DESC_NOTIFY, ad->base + REG_DESC_WRITE(channo));
writel_relaxed(lower_32_bits(addr), ad->base + REG_DESC_WRITE(channo));
writel_relaxed(upper_32_bits(addr), ad->base + REG_DESC_WRITE(channo));
writel_relaxed(tx->period_len, ad->base + REG_DESC_WRITE(channo));
writel_relaxed(FLAG_DESC_NOTIFY, ad->base + REG_DESC_WRITE(channo));
tx->submitted_pos += tx->period_len;
tx->submitted_pos %= 2 * tx->buf_len;