mirror of
https://github.com/edk2-porting/linux-next.git
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sh: Move in the SH-5 mmu_context headers.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
parent
9085fa1255
commit
cdcc970829
27
include/asm-sh/cpu-sh5/mmu_context.h
Normal file
27
include/asm-sh/cpu-sh5/mmu_context.h
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@ -0,0 +1,27 @@
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#ifndef __ASM_SH_CPU_SH5_MMU_CONTEXT_H
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#define __ASM_SH_CPU_SH5_MMU_CONTEXT_H
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/* Common defines */
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#define TLB_STEP 0x00000010
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#define TLB_PTEH 0x00000000
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#define TLB_PTEL 0x00000008
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/* PTEH defines */
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#define PTEH_ASID_SHIFT 2
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#define PTEH_VALID 0x0000000000000001
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#define PTEH_SHARED 0x0000000000000002
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#define PTEH_MATCH_ASID 0x00000000000003ff
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#ifndef __ASSEMBLY__
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/* This has to be a common function because the next location to fill
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* information is shared. */
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extern void __do_tlb_refill(unsigned long address, unsigned long long is_text_not_data, pte_t *pte);
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/* Profiling counter. */
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#ifdef CONFIG_SH64_PROC_TLB
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extern unsigned long long calls_to_do_fast_page_fault;
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_SH_CPU_SH5_MMU_CONTEXT_H */
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@ -1,13 +1,13 @@
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/*
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* Copyright (C) 1999 Niibe Yutaka
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* Copyright (C) 2003 - 2006 Paul Mundt
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* Copyright (C) 2003 - 2007 Paul Mundt
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*
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* ASID handling idea taken from MIPS implementation.
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*/
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#ifndef __ASM_SH_MMU_CONTEXT_H
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#define __ASM_SH_MMU_CONTEXT_H
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#ifdef __KERNEL__
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#ifdef __KERNEL__
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#include <asm/cpu/mmu_context.h>
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#include <asm/tlbflush.h>
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#include <asm/uaccess.h>
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@ -19,7 +19,6 @@
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* (a) TLB cache version (or round, cycle whatever expression you like)
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* (b) ASID (Address Space IDentifier)
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*/
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#define MMU_CONTEXT_ASID_MASK 0x000000ff
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#define MMU_CONTEXT_VERSION_MASK 0xffffff00
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#define MMU_CONTEXT_FIRST_VERSION 0x00000100
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@ -28,10 +27,11 @@
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/* ASID is 8-bit value, so it can't be 0x100 */
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#define MMU_NO_ASID 0x100
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#define cpu_context(cpu, mm) ((mm)->context.id[cpu])
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#define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & \
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MMU_CONTEXT_ASID_MASK)
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#define asid_cache(cpu) (cpu_data[cpu].asid_cache)
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#define cpu_context(cpu, mm) ((mm)->context.id[cpu])
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#define cpu_asid(cpu, mm) \
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(cpu_context((cpu), (mm)) & MMU_CONTEXT_ASID_MASK)
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/*
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* Virtual Page Number mask
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@ -39,6 +39,12 @@
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#define MMU_VPN_MASK 0xfffff000
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#ifdef CONFIG_MMU
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#if defined(CONFIG_SUPERH32)
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#include "mmu_context_32.h"
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#else
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#include "mmu_context_64.h"
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#endif
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/*
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* Get MMU context if needed.
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*/
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@ -59,6 +65,14 @@ static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu)
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*/
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flush_tlb_all();
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#ifdef CONFIG_SUPERH64
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/*
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* The SH-5 cache uses the ASIDs, requiring both the I and D
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* cache to be flushed when the ASID is exhausted. Weak.
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*/
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flush_cache_all();
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#endif
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/*
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* Fix version; Note that we avoid version #0
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* to distingush NO_CONTEXT.
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@ -85,39 +99,6 @@ static inline int init_new_context(struct task_struct *tsk,
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return 0;
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}
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/*
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* Destroy context related info for an mm_struct that is about
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* to be put to rest.
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*/
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static inline void destroy_context(struct mm_struct *mm)
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{
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/* Do nothing */
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}
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static inline void set_asid(unsigned long asid)
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{
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unsigned long __dummy;
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__asm__ __volatile__ ("mov.l %2, %0\n\t"
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"and %3, %0\n\t"
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"or %1, %0\n\t"
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"mov.l %0, %2"
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: "=&r" (__dummy)
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: "r" (asid), "m" (__m(MMU_PTEH)),
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"r" (0xffffff00));
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}
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static inline unsigned long get_asid(void)
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{
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unsigned long asid;
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__asm__ __volatile__ ("mov.l %1, %0"
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: "=r" (asid)
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: "m" (__m(MMU_PTEH)));
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asid &= MMU_CONTEXT_ASID_MASK;
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return asid;
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}
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/*
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* After we have set current->mm to a new value, this activates
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* the context for the new mm so we see the new mappings.
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@ -128,17 +109,6 @@ static inline void activate_context(struct mm_struct *mm, unsigned int cpu)
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set_asid(cpu_asid(cpu, mm));
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}
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/* MMU_TTB is used for optimizing the fault handling. */
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static inline void set_TTB(pgd_t *pgd)
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{
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ctrl_outl((unsigned long)pgd, MMU_TTB);
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}
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static inline pgd_t *get_TTB(void)
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{
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return (pgd_t *)ctrl_inl(MMU_TTB);
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}
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static inline void switch_mm(struct mm_struct *prev,
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struct mm_struct *next,
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struct task_struct *tsk)
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@ -153,17 +123,7 @@ static inline void switch_mm(struct mm_struct *prev,
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if (!cpu_test_and_set(cpu, next->cpu_vm_mask))
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activate_context(next, cpu);
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}
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#define deactivate_mm(tsk,mm) do { } while (0)
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#define activate_mm(prev, next) \
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switch_mm((prev),(next),NULL)
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static inline void
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enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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}
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#else /* !CONFIG_MMU */
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#else
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#define get_mmu_context(mm) do { } while (0)
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#define init_new_context(tsk,mm) (0)
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#define destroy_context(mm) do { } while (0)
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@ -173,11 +133,12 @@ enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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#define get_TTB() (0)
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#define activate_context(mm,cpu) do { } while (0)
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#define switch_mm(prev,next,tsk) do { } while (0)
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#define deactivate_mm(tsk,mm) do { } while (0)
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#define activate_mm(prev,next) do { } while (0)
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#define enter_lazy_tlb(mm,tsk) do { } while (0)
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#endif /* CONFIG_MMU */
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#define activate_mm(prev, next) switch_mm((prev),(next),NULL)
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#define deactivate_mm(tsk,mm) do { } while (0)
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#define enter_lazy_tlb(mm,tsk) do { } while (0)
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#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4)
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/*
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* If this processor has an MMU, we need methods to turn it off/on ..
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47
include/asm-sh/mmu_context_32.h
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47
include/asm-sh/mmu_context_32.h
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@ -0,0 +1,47 @@
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#ifndef __ASM_SH_MMU_CONTEXT_32_H
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#define __ASM_SH_MMU_CONTEXT_32_H
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/*
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* Destroy context related info for an mm_struct that is about
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* to be put to rest.
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*/
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static inline void destroy_context(struct mm_struct *mm)
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{
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/* Do nothing */
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}
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static inline void set_asid(unsigned long asid)
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{
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unsigned long __dummy;
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__asm__ __volatile__ ("mov.l %2, %0\n\t"
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"and %3, %0\n\t"
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"or %1, %0\n\t"
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"mov.l %0, %2"
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: "=&r" (__dummy)
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: "r" (asid), "m" (__m(MMU_PTEH)),
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"r" (0xffffff00));
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}
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static inline unsigned long get_asid(void)
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{
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unsigned long asid;
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__asm__ __volatile__ ("mov.l %1, %0"
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: "=r" (asid)
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: "m" (__m(MMU_PTEH)));
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asid &= MMU_CONTEXT_ASID_MASK;
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return asid;
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}
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/* MMU_TTB is used for optimizing the fault handling. */
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static inline void set_TTB(pgd_t *pgd)
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{
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ctrl_outl((unsigned long)pgd, MMU_TTB);
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}
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static inline pgd_t *get_TTB(void)
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{
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return (pgd_t *)ctrl_inl(MMU_TTB);
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}
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#endif /* __ASM_SH_MMU_CONTEXT_32_H */
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75
include/asm-sh/mmu_context_64.h
Normal file
75
include/asm-sh/mmu_context_64.h
Normal file
@ -0,0 +1,75 @@
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#ifndef __ASM_SH_MMU_CONTEXT_64_H
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#define __ASM_SH_MMU_CONTEXT_64_H
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/*
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* sh64-specific mmu_context interface.
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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* Copyright (C) 2003 - 2007 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <asm/cpu/registers.h>
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#include <asm/cacheflush.h>
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#define SR_ASID_MASK 0xffffffffff00ffffULL
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#define SR_ASID_SHIFT 16
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/*
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* Destroy context related info for an mm_struct that is about
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* to be put to rest.
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*/
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static inline void destroy_context(struct mm_struct *mm)
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{
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/* Well, at least free TLB entries */
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flush_tlb_mm(mm);
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}
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static inline unsigned long get_asid(void)
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{
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unsigned long long sr;
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asm volatile ("getcon " __SR ", %0\n\t"
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: "=r" (sr));
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sr = (sr >> SR_ASID_SHIFT) & MMU_CONTEXT_ASID_MASK;
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return (unsigned long) sr;
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}
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/* Set ASID into SR */
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static inline void set_asid(unsigned long asid)
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{
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unsigned long long sr, pc;
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asm volatile ("getcon " __SR ", %0" : "=r" (sr));
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sr = (sr & SR_ASID_MASK) | (asid << SR_ASID_SHIFT);
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/*
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* It is possible that this function may be inlined and so to avoid
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* the assembler reporting duplicate symbols we make use of the
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* gas trick of generating symbols using numerics and forward
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* reference.
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*/
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asm volatile ("movi 1, %1\n\t"
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"shlli %1, 28, %1\n\t"
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"or %0, %1, %1\n\t"
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"putcon %1, " __SR "\n\t"
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"putcon %0, " __SSR "\n\t"
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"movi 1f, %1\n\t"
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"ori %1, 1 , %1\n\t"
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"putcon %1, " __SPC "\n\t"
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"rte\n"
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"1:\n\t"
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: "=r" (sr), "=r" (pc) : "0" (sr));
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}
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/* No spare register to twiddle, so use a software cache */
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extern pgd_t *mmu_pdtp_cache;
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#define set_TTB(pgd) (mmu_pdtp_cache = (pgd))
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#define get_TTB() (mmu_pdtp_cache)
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#endif /* __ASM_SH_MMU_CONTEXT_64_H */
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@ -1,208 +0,0 @@
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#ifndef __ASM_SH64_MMU_CONTEXT_H
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#define __ASM_SH64_MMU_CONTEXT_H
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* include/asm-sh64/mmu_context.h
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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* Copyright (C) 2003 Paul Mundt
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*
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* ASID handling idea taken from MIPS implementation.
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*
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*/
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#ifndef __ASSEMBLY__
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/*
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* Cache of MMU context last used.
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*
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* The MMU "context" consists of two things:
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* (a) TLB cache version (or cycle, top 24 bits of mmu_context_cache)
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* (b) ASID (Address Space IDentifier, bottom 8 bits of mmu_context_cache)
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*/
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extern unsigned long mmu_context_cache;
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#include <asm/page.h>
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#include <asm-generic/mm_hooks.h>
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/* Current mm's pgd */
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extern pgd_t *mmu_pdtp_cache;
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#define SR_ASID_MASK 0xffffffffff00ffffULL
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#define SR_ASID_SHIFT 16
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#define MMU_CONTEXT_ASID_MASK 0x000000ff
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#define MMU_CONTEXT_VERSION_MASK 0xffffff00
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#define MMU_CONTEXT_FIRST_VERSION 0x00000100
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#define NO_CONTEXT 0
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/* ASID is 8-bit value, so it can't be 0x100 */
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#define MMU_NO_ASID 0x100
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/*
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* Virtual Page Number mask
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*/
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#define MMU_VPN_MASK 0xfffff000
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static inline void
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get_new_mmu_context(struct mm_struct *mm)
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{
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extern void flush_tlb_all(void);
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extern void flush_cache_all(void);
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unsigned long mc = ++mmu_context_cache;
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if (!(mc & MMU_CONTEXT_ASID_MASK)) {
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/* We exhaust ASID of this version.
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Flush all TLB and start new cycle. */
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flush_tlb_all();
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/* We have to flush all caches as ASIDs are
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used in cache */
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flush_cache_all();
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/* Fix version if needed.
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Note that we avoid version #0/asid #0 to distingush NO_CONTEXT. */
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if (!mc)
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mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
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}
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mm->context = mc;
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}
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/*
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* Get MMU context if needed.
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*/
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static __inline__ void
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get_mmu_context(struct mm_struct *mm)
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{
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if (mm) {
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unsigned long mc = mmu_context_cache;
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/* Check if we have old version of context.
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If it's old, we need to get new context with new version. */
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if ((mm->context ^ mc) & MMU_CONTEXT_VERSION_MASK)
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get_new_mmu_context(mm);
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}
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}
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/*
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* Initialize the context related info for a new mm_struct
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* instance.
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*/
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static inline int init_new_context(struct task_struct *tsk,
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struct mm_struct *mm)
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{
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mm->context = NO_CONTEXT;
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return 0;
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}
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/*
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* Destroy context related info for an mm_struct that is about
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* to be put to rest.
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*/
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static inline void destroy_context(struct mm_struct *mm)
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{
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extern void flush_tlb_mm(struct mm_struct *mm);
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/* Well, at least free TLB entries */
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flush_tlb_mm(mm);
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}
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#endif /* __ASSEMBLY__ */
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/* Common defines */
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#define TLB_STEP 0x00000010
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#define TLB_PTEH 0x00000000
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#define TLB_PTEL 0x00000008
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/* PTEH defines */
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#define PTEH_ASID_SHIFT 2
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#define PTEH_VALID 0x0000000000000001
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#define PTEH_SHARED 0x0000000000000002
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#define PTEH_MATCH_ASID 0x00000000000003ff
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#ifndef __ASSEMBLY__
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/* This has to be a common function because the next location to fill
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* information is shared. */
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extern void __do_tlb_refill(unsigned long address, unsigned long long is_text_not_data, pte_t *pte);
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/* Profiling counter. */
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#ifdef CONFIG_SH64_PROC_TLB
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extern unsigned long long calls_to_do_fast_page_fault;
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#endif
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static inline unsigned long get_asid(void)
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{
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unsigned long long sr;
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asm volatile ("getcon " __SR ", %0\n\t"
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: "=r" (sr));
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sr = (sr >> SR_ASID_SHIFT) & MMU_CONTEXT_ASID_MASK;
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return (unsigned long) sr;
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}
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/* Set ASID into SR */
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static inline void set_asid(unsigned long asid)
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{
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unsigned long long sr, pc;
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asm volatile ("getcon " __SR ", %0" : "=r" (sr));
|
||||
|
||||
sr = (sr & SR_ASID_MASK) | (asid << SR_ASID_SHIFT);
|
||||
|
||||
/*
|
||||
* It is possible that this function may be inlined and so to avoid
|
||||
* the assembler reporting duplicate symbols we make use of the gas trick
|
||||
* of generating symbols using numerics and forward reference.
|
||||
*/
|
||||
asm volatile ("movi 1, %1\n\t"
|
||||
"shlli %1, 28, %1\n\t"
|
||||
"or %0, %1, %1\n\t"
|
||||
"putcon %1, " __SR "\n\t"
|
||||
"putcon %0, " __SSR "\n\t"
|
||||
"movi 1f, %1\n\t"
|
||||
"ori %1, 1 , %1\n\t"
|
||||
"putcon %1, " __SPC "\n\t"
|
||||
"rte\n"
|
||||
"1:\n\t"
|
||||
: "=r" (sr), "=r" (pc) : "0" (sr));
|
||||
}
|
||||
|
||||
/*
|
||||
* After we have set current->mm to a new value, this activates
|
||||
* the context for the new mm so we see the new mappings.
|
||||
*/
|
||||
static __inline__ void activate_context(struct mm_struct *mm)
|
||||
{
|
||||
get_mmu_context(mm);
|
||||
set_asid(mm->context & MMU_CONTEXT_ASID_MASK);
|
||||
}
|
||||
|
||||
|
||||
static __inline__ void switch_mm(struct mm_struct *prev,
|
||||
struct mm_struct *next,
|
||||
struct task_struct *tsk)
|
||||
{
|
||||
if (prev != next) {
|
||||
mmu_pdtp_cache = next->pgd;
|
||||
activate_context(next);
|
||||
}
|
||||
}
|
||||
|
||||
#define deactivate_mm(tsk,mm) do { } while (0)
|
||||
|
||||
#define activate_mm(prev, next) \
|
||||
switch_mm((prev),(next),NULL)
|
||||
|
||||
static inline void
|
||||
enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
|
||||
{
|
||||
}
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* __ASM_SH64_MMU_CONTEXT_H */
|
||||
Loading…
Reference in New Issue
Block a user