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drm/amdgpu: unify the interface of amd_pm_funcs
put amd_pm_funcs table in struct powerplay for all asics. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rex Zhu
Alex Deucher
parent
f93f0c3a7e
commit
cd4d74648b
@ -3498,10 +3498,7 @@ static ssize_t amdgpu_debugfs_sensor_read(struct file *f, char __user *buf,
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valuesize = sizeof(values);
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if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->read_sensor)
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r = adev->powerplay.pp_funcs->read_sensor(adev->powerplay.pp_handle, idx, &values[0], &valuesize);
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else if (adev->pm.funcs && adev->pm.funcs->read_sensor)
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r = adev->pm.funcs->read_sensor(adev, idx, &values[0],
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&valuesize);
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r = amdgpu_dpm_read_sensor(adev, idx, &values[0], &valuesize);
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else
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return -EINVAL;
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@ -241,134 +241,119 @@ enum amdgpu_pcie_gen {
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AMDGPU_PCIE_GEN_INVALID = 0xffff
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};
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#define amdgpu_dpm_pre_set_power_state(adev) (adev)->pm.funcs->pre_set_power_state((adev))
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#define amdgpu_dpm_set_power_state(adev) (adev)->pm.funcs->set_power_state((adev))
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#define amdgpu_dpm_post_set_power_state(adev) (adev)->pm.funcs->post_set_power_state((adev))
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#define amdgpu_dpm_display_configuration_changed(adev) (adev)->pm.funcs->display_configuration_changed((adev))
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#define amdgpu_dpm_print_power_state(adev, ps) (adev)->pm.funcs->print_power_state((adev), (ps))
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#define amdgpu_dpm_vblank_too_short(adev) (adev)->pm.funcs->vblank_too_short((adev))
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#define amdgpu_dpm_enable_bapm(adev, e) (adev)->pm.funcs->enable_bapm((adev), (e))
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#define amdgpu_dpm_pre_set_power_state(adev) \
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((adev)->powerplay.pp_funcs->pre_set_power_state((adev)->powerplay.pp_handle))
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#define amdgpu_dpm_set_power_state(adev) \
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((adev)->powerplay.pp_funcs->set_power_state((adev)->powerplay.pp_handle))
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#define amdgpu_dpm_post_set_power_state(adev) \
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((adev)->powerplay.pp_funcs->post_set_power_state((adev)->powerplay.pp_handle))
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#define amdgpu_dpm_display_configuration_changed(adev) \
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((adev)->powerplay.pp_funcs->display_configuration_changed((adev)->powerplay.pp_handle))
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#define amdgpu_dpm_print_power_state(adev, ps) \
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((adev)->powerplay.pp_funcs->print_power_state((adev)->powerplay.pp_handle, (ps)))
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#define amdgpu_dpm_vblank_too_short(adev) \
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((adev)->powerplay.pp_funcs->vblank_too_short((adev)->powerplay.pp_handle))
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#define amdgpu_dpm_enable_bapm(adev, e) \
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((adev)->powerplay.pp_funcs->enable_bapm((adev)->powerplay.pp_handle, (e)))
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#define amdgpu_dpm_read_sensor(adev, idx, value, size) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->read_sensor(adev->powerplay.pp_handle, (idx), (value), (size)) : \
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(adev)->pm.funcs->read_sensor((adev), (idx), (value), (size)))
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((adev)->powerplay.pp_funcs->read_sensor((adev)->powerplay.pp_handle, (idx), (value), (size)))
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#define amdgpu_dpm_get_temperature(adev) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->get_temperature((adev)->powerplay.pp_handle) : \
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(adev)->pm.funcs->get_temperature((adev)))
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((adev)->powerplay.pp_funcs->get_temperature((adev)->powerplay.pp_handle))
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#define amdgpu_dpm_set_fan_control_mode(adev, m) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->set_fan_control_mode((adev)->powerplay.pp_handle, (m)) : \
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(adev)->pm.funcs->set_fan_control_mode((adev), (m)))
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((adev)->powerplay.pp_funcs->set_fan_control_mode((adev)->powerplay.pp_handle, (m)))
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#define amdgpu_dpm_get_fan_control_mode(adev) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->get_fan_control_mode((adev)->powerplay.pp_handle) : \
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(adev)->pm.funcs->get_fan_control_mode((adev)))
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((adev)->powerplay.pp_funcs->get_fan_control_mode((adev)->powerplay.pp_handle))
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#define amdgpu_dpm_set_fan_speed_percent(adev, s) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->set_fan_speed_percent((adev)->powerplay.pp_handle, (s)) : \
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(adev)->pm.funcs->set_fan_speed_percent((adev), (s)))
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((adev)->powerplay.pp_funcs->set_fan_speed_percent((adev)->powerplay.pp_handle, (s)))
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#define amdgpu_dpm_get_fan_speed_percent(adev, s) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->get_fan_speed_percent((adev)->powerplay.pp_handle, (s)) : \
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(adev)->pm.funcs->get_fan_speed_percent((adev), (s)))
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((adev)->powerplay.pp_funcs->get_fan_speed_percent((adev)->powerplay.pp_handle, (s)))
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#define amdgpu_dpm_get_fan_speed_rpm(adev, s) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->get_fan_speed_rpm((adev)->powerplay.pp_handle, (s)) : \
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-EINVAL)
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((adev)->powerplay.pp_funcs->get_fan_speed_rpm)((adev)->powerplay.pp_handle, (s))
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#define amdgpu_dpm_get_sclk(adev, l) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->get_sclk((adev)->powerplay.pp_handle, (l)) : \
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(adev)->pm.funcs->get_sclk((adev), (l)))
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((adev)->powerplay.pp_funcs->get_sclk((adev)->powerplay.pp_handle, (l)))
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#define amdgpu_dpm_get_mclk(adev, l) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->get_mclk((adev)->powerplay.pp_handle, (l)) : \
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(adev)->pm.funcs->get_mclk((adev), (l)))
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((adev)->powerplay.pp_funcs->get_mclk((adev)->powerplay.pp_handle, (l)))
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#define amdgpu_dpm_force_performance_level(adev, l) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->force_performance_level((adev)->powerplay.pp_handle, (l)) : \
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(adev)->pm.funcs->force_performance_level((adev), (l)))
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((adev)->powerplay.pp_funcs->force_performance_level((adev)->powerplay.pp_handle, (l)))
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#define amdgpu_dpm_powergate_uvd(adev, g) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->powergate_uvd((adev)->powerplay.pp_handle, (g)) : \
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(adev)->pm.funcs->powergate_uvd((adev), (g)))
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((adev)->powerplay.pp_funcs->powergate_uvd((adev)->powerplay.pp_handle, (g)))
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#define amdgpu_dpm_powergate_vce(adev, g) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->powergate_vce((adev)->powerplay.pp_handle, (g)) : \
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(adev)->pm.funcs->powergate_vce((adev), (g)))
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((adev)->powerplay.pp_funcs->powergate_vce((adev)->powerplay.pp_handle, (g)))
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#define amdgpu_dpm_get_current_power_state(adev) \
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(adev)->powerplay.pp_funcs->get_current_power_state((adev)->powerplay.pp_handle)
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((adev)->powerplay.pp_funcs->get_current_power_state((adev)->powerplay.pp_handle))
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#define amdgpu_dpm_get_pp_num_states(adev, data) \
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(adev)->powerplay.pp_funcs->get_pp_num_states((adev)->powerplay.pp_handle, data)
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((adev)->powerplay.pp_funcs->get_pp_num_states((adev)->powerplay.pp_handle, data))
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#define amdgpu_dpm_get_pp_table(adev, table) \
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(adev)->powerplay.pp_funcs->get_pp_table((adev)->powerplay.pp_handle, table)
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((adev)->powerplay.pp_funcs->get_pp_table((adev)->powerplay.pp_handle, table))
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#define amdgpu_dpm_set_pp_table(adev, buf, size) \
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(adev)->powerplay.pp_funcs->set_pp_table((adev)->powerplay.pp_handle, buf, size)
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((adev)->powerplay.pp_funcs->set_pp_table((adev)->powerplay.pp_handle, buf, size))
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#define amdgpu_dpm_print_clock_levels(adev, type, buf) \
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(adev)->powerplay.pp_funcs->print_clock_levels((adev)->powerplay.pp_handle, type, buf)
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((adev)->powerplay.pp_funcs->print_clock_levels((adev)->powerplay.pp_handle, type, buf))
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#define amdgpu_dpm_force_clock_level(adev, type, level) \
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(adev)->powerplay.pp_funcs->force_clock_level((adev)->powerplay.pp_handle, type, level)
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((adev)->powerplay.pp_funcs->force_clock_level((adev)->powerplay.pp_handle, type, level))
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#define amdgpu_dpm_get_sclk_od(adev) \
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(adev)->powerplay.pp_funcs->get_sclk_od((adev)->powerplay.pp_handle)
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((adev)->powerplay.pp_funcs->get_sclk_od((adev)->powerplay.pp_handle))
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#define amdgpu_dpm_set_sclk_od(adev, value) \
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(adev)->powerplay.pp_funcs->set_sclk_od((adev)->powerplay.pp_handle, value)
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((adev)->powerplay.pp_funcs->set_sclk_od((adev)->powerplay.pp_handle, value))
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#define amdgpu_dpm_get_mclk_od(adev) \
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((adev)->powerplay.pp_funcs->get_mclk_od((adev)->powerplay.pp_handle))
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((adev)->powerplay.pp_funcs->get_mclk_od((adev)->powerplay.pp_handle))
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#define amdgpu_dpm_set_mclk_od(adev, value) \
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((adev)->powerplay.pp_funcs->set_mclk_od((adev)->powerplay.pp_handle, value))
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((adev)->powerplay.pp_funcs->set_mclk_od((adev)->powerplay.pp_handle, value))
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#define amdgpu_dpm_dispatch_task(adev, task_id, input, output) \
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((adev)->powerplay.pp_funcs->dispatch_tasks)((adev)->powerplay.pp_handle, (task_id), (input), (output))
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((adev)->powerplay.pp_funcs->dispatch_tasks)((adev)->powerplay.pp_handle, (task_id), (input), (output))
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#define amgdpu_dpm_check_state_equal(adev, cps, rps, equal) (adev)->pm.funcs->check_state_equal((adev), (cps),(rps),(equal))
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#define amdgpu_dpm_check_state_equal(adev, cps, rps, equal) \
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((adev)->powerplay.pp_funcs->check_state_equal((adev)->powerplay.pp_handle, (cps), (rps), (equal)))
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#define amdgpu_dpm_get_vce_clock_state(adev, i) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->get_vce_clock_state((adev)->powerplay.pp_handle, (i)) : \
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(adev)->pm.funcs->get_vce_clock_state((adev), (i)))
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((adev)->powerplay.pp_funcs->get_vce_clock_state((adev)->powerplay.pp_handle, (i)))
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#define amdgpu_dpm_get_performance_level(adev) \
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((adev)->pp_enabled ? \
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(adev)->powerplay.pp_funcs->get_performance_level((adev)->powerplay.pp_handle) : \
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(adev)->pm.dpm.forced_level)
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#define amdgpu_dpm_get_performance_level(adev) \
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((adev)->powerplay.pp_funcs->get_performance_level((adev)->powerplay.pp_handle))
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#define amdgpu_dpm_reset_power_profile_state(adev, request) \
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((adev)->powerplay.pp_funcs->reset_power_profile_state(\
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((adev)->powerplay.pp_funcs->reset_power_profile_state(\
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(adev)->powerplay.pp_handle, request))
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#define amdgpu_dpm_get_power_profile_state(adev, query) \
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((adev)->powerplay.pp_funcs->get_power_profile_state(\
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((adev)->powerplay.pp_funcs->get_power_profile_state(\
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(adev)->powerplay.pp_handle, query))
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#define amdgpu_dpm_set_power_profile_state(adev, request) \
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((adev)->powerplay.pp_funcs->set_power_profile_state(\
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((adev)->powerplay.pp_funcs->set_power_profile_state(\
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(adev)->powerplay.pp_handle, request))
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#define amdgpu_dpm_switch_power_profile(adev, type) \
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((adev)->powerplay.pp_funcs->switch_power_profile(\
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((adev)->powerplay.pp_funcs->switch_power_profile(\
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(adev)->powerplay.pp_handle, type))
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struct amdgpu_dpm {
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@ -442,7 +427,6 @@ struct amdgpu_pm {
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struct amdgpu_dpm dpm;
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const struct firmware *fw; /* SMC firmware */
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uint32_t fw_version;
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const struct amd_pm_funcs *funcs;
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uint32_t pcie_gen_mask;
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uint32_t pcie_mlw_mask;
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struct amd_pp_display_configuration pm_display_cfg;/* set by DAL */
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@ -74,7 +74,7 @@ void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev)
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adev->pm.dpm.ac_power = true;
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else
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adev->pm.dpm.ac_power = false;
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if (adev->pm.funcs->enable_bapm)
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if (adev->powerplay.pp_funcs->enable_bapm)
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amdgpu_dpm_enable_bapm(adev, adev->pm.dpm.ac_power);
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mutex_unlock(&adev->pm.mutex);
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}
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@ -88,9 +88,9 @@ static ssize_t amdgpu_get_dpm_state(struct device *dev,
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struct amdgpu_device *adev = ddev->dev_private;
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enum amd_pm_state_type pm;
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if (adev->pp_enabled) {
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if (adev->powerplay.pp_funcs->get_current_power_state)
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pm = amdgpu_dpm_get_current_power_state(adev);
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} else
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else
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pm = adev->pm.dpm.user_state;
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return snprintf(buf, PAGE_SIZE, "%s\n",
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@ -140,13 +140,17 @@ static ssize_t amdgpu_get_dpm_forced_performance_level(struct device *dev,
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{
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struct drm_device *ddev = dev_get_drvdata(dev);
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struct amdgpu_device *adev = ddev->dev_private;
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enum amd_dpm_forced_level level;
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enum amd_dpm_forced_level level = 0xff;
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if ((adev->flags & AMD_IS_PX) &&
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(ddev->switch_power_state != DRM_SWITCH_POWER_ON))
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return snprintf(buf, PAGE_SIZE, "off\n");
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level = amdgpu_dpm_get_performance_level(adev);
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if (adev->powerplay.pp_funcs->get_performance_level)
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level = amdgpu_dpm_get_performance_level(adev);
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else
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level = adev->pm.dpm.forced_level;
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return snprintf(buf, PAGE_SIZE, "%s\n",
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(level == AMD_DPM_FORCED_LEVEL_AUTO) ? "auto" :
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(level == AMD_DPM_FORCED_LEVEL_LOW) ? "low" :
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@ -167,7 +171,7 @@ static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev,
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struct drm_device *ddev = dev_get_drvdata(dev);
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struct amdgpu_device *adev = ddev->dev_private;
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enum amd_dpm_forced_level level;
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enum amd_dpm_forced_level current_level;
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enum amd_dpm_forced_level current_level = 0xff;
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int ret = 0;
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/* Can't force performance level when the card is off */
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@ -175,7 +179,8 @@ static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev,
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(ddev->switch_power_state != DRM_SWITCH_POWER_ON))
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return -EINVAL;
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current_level = amdgpu_dpm_get_performance_level(adev);
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if (adev->powerplay.pp_funcs->get_performance_level)
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current_level = amdgpu_dpm_get_performance_level(adev);
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if (strncmp("low", buf, strlen("low")) == 0) {
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level = AMD_DPM_FORCED_LEVEL_LOW;
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@ -203,9 +208,7 @@ static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev,
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if (current_level == level)
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return count;
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if (adev->pp_enabled)
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amdgpu_dpm_force_performance_level(adev, level);
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else {
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if (adev->powerplay.pp_funcs->force_performance_level) {
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mutex_lock(&adev->pm.mutex);
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if (adev->pm.dpm.thermal_active) {
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count = -EINVAL;
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@ -233,7 +236,7 @@ static ssize_t amdgpu_get_pp_num_states(struct device *dev,
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struct pp_states_info data;
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int i, buf_len;
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if (adev->pp_enabled)
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if (adev->powerplay.pp_funcs->get_pp_num_states)
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amdgpu_dpm_get_pp_num_states(adev, &data);
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buf_len = snprintf(buf, PAGE_SIZE, "states: %d\n", data.nums);
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@ -257,8 +260,8 @@ static ssize_t amdgpu_get_pp_cur_state(struct device *dev,
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enum amd_pm_state_type pm = 0;
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int i = 0;
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if (adev->pp_enabled) {
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if (adev->powerplay.pp_funcs->get_current_power_state
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&& adev->powerplay.pp_funcs->get_pp_num_states) {
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pm = amdgpu_dpm_get_current_power_state(adev);
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amdgpu_dpm_get_pp_num_states(adev, &data);
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@ -280,25 +283,10 @@ static ssize_t amdgpu_get_pp_force_state(struct device *dev,
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{
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struct drm_device *ddev = dev_get_drvdata(dev);
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struct amdgpu_device *adev = ddev->dev_private;
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struct pp_states_info data;
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enum amd_pm_state_type pm = 0;
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int i;
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if (adev->pp_force_state_enabled && adev->pp_enabled) {
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pm = amdgpu_dpm_get_current_power_state(adev);
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amdgpu_dpm_get_pp_num_states(adev, &data);
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|
||||
for (i = 0; i < data.nums; i++) {
|
||||
if (pm == data.states[i])
|
||||
break;
|
||||
}
|
||||
|
||||
if (i == data.nums)
|
||||
i = -EINVAL;
|
||||
|
||||
return snprintf(buf, PAGE_SIZE, "%d\n", i);
|
||||
|
||||
} else
|
||||
if (adev->pp_force_state_enabled)
|
||||
return amdgpu_get_pp_cur_state(dev, attr, buf);
|
||||
else
|
||||
return snprintf(buf, PAGE_SIZE, "\n");
|
||||
}
|
||||
|
||||
@ -347,7 +335,7 @@ static ssize_t amdgpu_get_pp_table(struct device *dev,
|
||||
char *table = NULL;
|
||||
int size;
|
||||
|
||||
if (adev->pp_enabled)
|
||||
if (adev->powerplay.pp_funcs->get_pp_table)
|
||||
size = amdgpu_dpm_get_pp_table(adev, &table);
|
||||
else
|
||||
return 0;
|
||||
@ -368,7 +356,7 @@ static ssize_t amdgpu_set_pp_table(struct device *dev,
|
||||
struct drm_device *ddev = dev_get_drvdata(dev);
|
||||
struct amdgpu_device *adev = ddev->dev_private;
|
||||
|
||||
if (adev->pp_enabled)
|
||||
if (adev->powerplay.pp_funcs->set_pp_table)
|
||||
amdgpu_dpm_set_pp_table(adev, buf, count);
|
||||
|
||||
return count;
|
||||
@ -380,14 +368,11 @@ static ssize_t amdgpu_get_pp_dpm_sclk(struct device *dev,
|
||||
{
|
||||
struct drm_device *ddev = dev_get_drvdata(dev);
|
||||
struct amdgpu_device *adev = ddev->dev_private;
|
||||
ssize_t size = 0;
|
||||
|
||||
if (adev->pp_enabled)
|
||||
size = amdgpu_dpm_print_clock_levels(adev, PP_SCLK, buf);
|
||||
else if (adev->pm.funcs->print_clock_levels)
|
||||
size = adev->pm.funcs->print_clock_levels(adev, PP_SCLK, buf);
|
||||
|
||||
return size;
|
||||
if (adev->powerplay.pp_funcs->print_clock_levels)
|
||||
return amdgpu_dpm_print_clock_levels(adev, PP_SCLK, buf);
|
||||
else
|
||||
return snprintf(buf, PAGE_SIZE, "\n");
|
||||
}
|
||||
|
||||
static ssize_t amdgpu_set_pp_dpm_sclk(struct device *dev,
|
||||
@ -416,10 +401,9 @@ static ssize_t amdgpu_set_pp_dpm_sclk(struct device *dev,
|
||||
mask |= 1 << level;
|
||||
}
|
||||
|
||||
if (adev->pp_enabled)
|
||||
if (adev->powerplay.pp_funcs->force_clock_level)
|
||||
amdgpu_dpm_force_clock_level(adev, PP_SCLK, mask);
|
||||
else if (adev->pm.funcs->force_clock_level)
|
||||
adev->pm.funcs->force_clock_level(adev, PP_SCLK, mask);
|
||||
|
||||
fail:
|
||||
return count;
|
||||
}
|
||||
@ -430,14 +414,11 @@ static ssize_t amdgpu_get_pp_dpm_mclk(struct device *dev,
|
||||
{
|
||||
struct drm_device *ddev = dev_get_drvdata(dev);
|
||||
struct amdgpu_device *adev = ddev->dev_private;
|
||||
ssize_t size = 0;
|
||||
|
||||
if (adev->pp_enabled)
|
||||
size = amdgpu_dpm_print_clock_levels(adev, PP_MCLK, buf);
|
||||
else if (adev->pm.funcs->print_clock_levels)
|
||||
size = adev->pm.funcs->print_clock_levels(adev, PP_MCLK, buf);
|
||||
|
||||
return size;
|
||||
if (adev->powerplay.pp_funcs->print_clock_levels)
|
||||
return amdgpu_dpm_print_clock_levels(adev, PP_MCLK, buf);
|
||||
else
|
||||
return snprintf(buf, PAGE_SIZE, "\n");
|
||||
}
|
||||
|
||||
static ssize_t amdgpu_set_pp_dpm_mclk(struct device *dev,
|
||||
@ -465,11 +446,9 @@ static ssize_t amdgpu_set_pp_dpm_mclk(struct device *dev,
|
||||
}
|
||||
mask |= 1 << level;
|
||||
}
|
||||
|
||||
if (adev->pp_enabled)
|
||||
if (adev->powerplay.pp_funcs->force_clock_level)
|
||||
amdgpu_dpm_force_clock_level(adev, PP_MCLK, mask);
|
||||
else if (adev->pm.funcs->force_clock_level)
|
||||
adev->pm.funcs->force_clock_level(adev, PP_MCLK, mask);
|
||||
|
||||
fail:
|
||||
return count;
|
||||
}
|
||||
@ -480,14 +459,11 @@ static ssize_t amdgpu_get_pp_dpm_pcie(struct device *dev,
|
||||
{
|
||||
struct drm_device *ddev = dev_get_drvdata(dev);
|
||||
struct amdgpu_device *adev = ddev->dev_private;
|
||||
ssize_t size = 0;
|
||||
|
||||
if (adev->pp_enabled)
|
||||
size = amdgpu_dpm_print_clock_levels(adev, PP_PCIE, buf);
|
||||
else if (adev->pm.funcs->print_clock_levels)
|
||||
size = adev->pm.funcs->print_clock_levels(adev, PP_PCIE, buf);
|
||||
|
||||
return size;
|
||||
if (adev->powerplay.pp_funcs->print_clock_levels)
|
||||
return amdgpu_dpm_print_clock_levels(adev, PP_PCIE, buf);
|
||||
else
|
||||
return snprintf(buf, PAGE_SIZE, "\n");
|
||||
}
|
||||
|
||||
static ssize_t amdgpu_set_pp_dpm_pcie(struct device *dev,
|
||||
@ -515,11 +491,9 @@ static ssize_t amdgpu_set_pp_dpm_pcie(struct device *dev,
|
||||
}
|
||||
mask |= 1 << level;
|
||||
}
|
||||
|
||||
if (adev->pp_enabled)
|
||||
if (adev->powerplay.pp_funcs->force_clock_level)
|
||||
amdgpu_dpm_force_clock_level(adev, PP_PCIE, mask);
|
||||
else if (adev->pm.funcs->force_clock_level)
|
||||
adev->pm.funcs->force_clock_level(adev, PP_PCIE, mask);
|
||||
|
||||
fail:
|
||||
return count;
|
||||
}
|
||||
@ -532,10 +506,8 @@ static ssize_t amdgpu_get_pp_sclk_od(struct device *dev,
|
||||
struct amdgpu_device *adev = ddev->dev_private;
|
||||
uint32_t value = 0;
|
||||
|
||||
if (adev->pp_enabled)
|
||||
if (adev->powerplay.pp_funcs->get_sclk_od)
|
||||
value = amdgpu_dpm_get_sclk_od(adev);
|
||||
else if (adev->pm.funcs->get_sclk_od)
|
||||
value = adev->pm.funcs->get_sclk_od(adev);
|
||||
|
||||
return snprintf(buf, PAGE_SIZE, "%d\n", value);
|
||||
}
|
||||
@ -556,12 +528,12 @@ static ssize_t amdgpu_set_pp_sclk_od(struct device *dev,
|
||||
count = -EINVAL;
|
||||
goto fail;
|
||||
}
|
||||
if (adev->powerplay.pp_funcs->set_sclk_od)
|
||||
amdgpu_dpm_set_sclk_od(adev, (uint32_t)value);
|
||||
|
||||
if (adev->pp_enabled) {
|
||||
amdgpu_dpm_set_sclk_od(adev, (uint32_t)value);
|
||||
amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);
|
||||
} else if (adev->pm.funcs->set_sclk_od) {
|
||||
adev->pm.funcs->set_sclk_od(adev, (uint32_t)value);
|
||||
} else {
|
||||
adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
|
||||
amdgpu_pm_compute_clocks(adev);
|
||||
}
|
||||
@ -578,10 +550,8 @@ static ssize_t amdgpu_get_pp_mclk_od(struct device *dev,
|
||||
struct amdgpu_device *adev = ddev->dev_private;
|
||||
uint32_t value = 0;
|
||||
|
||||
if (adev->pp_enabled)
|
||||
if (adev->powerplay.pp_funcs->get_mclk_od)
|
||||
value = amdgpu_dpm_get_mclk_od(adev);
|
||||
else if (adev->pm.funcs->get_mclk_od)
|
||||
value = adev->pm.funcs->get_mclk_od(adev);
|
||||
|
||||
return snprintf(buf, PAGE_SIZE, "%d\n", value);
|
||||
}
|
||||
@ -602,12 +572,12 @@ static ssize_t amdgpu_set_pp_mclk_od(struct device *dev,
|
||||
count = -EINVAL;
|
||||
goto fail;
|
||||
}
|
||||
if (adev->powerplay.pp_funcs->set_mclk_od)
|
||||
amdgpu_dpm_set_mclk_od(adev, (uint32_t)value);
|
||||
|
||||
if (adev->pp_enabled) {
|
||||
amdgpu_dpm_set_mclk_od(adev, (uint32_t)value);
|
||||
amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);
|
||||
} else if (adev->pm.funcs->set_mclk_od) {
|
||||
adev->pm.funcs->set_mclk_od(adev, (uint32_t)value);
|
||||
} else {
|
||||
adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
|
||||
amdgpu_pm_compute_clocks(adev);
|
||||
}
|
||||
@ -621,14 +591,11 @@ static ssize_t amdgpu_get_pp_power_profile(struct device *dev,
|
||||
{
|
||||
struct drm_device *ddev = dev_get_drvdata(dev);
|
||||
struct amdgpu_device *adev = ddev->dev_private;
|
||||
int ret = 0;
|
||||
int ret = 0xff;
|
||||
|
||||
if (adev->pp_enabled)
|
||||
if (adev->powerplay.pp_funcs->get_power_profile_state)
|
||||
ret = amdgpu_dpm_get_power_profile_state(
|
||||
adev, query);
|
||||
else if (adev->pm.funcs->get_power_profile_state)
|
||||
ret = adev->pm.funcs->get_power_profile_state(
|
||||
adev, query);
|
||||
|
||||
if (ret)
|
||||
return ret;
|
||||
@ -675,15 +642,12 @@ static ssize_t amdgpu_set_pp_power_profile(struct device *dev,
|
||||
char *sub_str, buf_cpy[128], *tmp_str;
|
||||
const char delimiter[3] = {' ', '\n', '\0'};
|
||||
long int value;
|
||||
int ret = 0;
|
||||
int ret = 0xff;
|
||||
|
||||
if (strncmp("reset", buf, strlen("reset")) == 0) {
|
||||
if (adev->pp_enabled)
|
||||
if (adev->powerplay.pp_funcs->reset_power_profile_state)
|
||||
ret = amdgpu_dpm_reset_power_profile_state(
|
||||
adev, request);
|
||||
else if (adev->pm.funcs->reset_power_profile_state)
|
||||
ret = adev->pm.funcs->reset_power_profile_state(
|
||||
adev, request);
|
||||
if (ret) {
|
||||
count = -EINVAL;
|
||||
goto fail;
|
||||
@ -692,12 +656,10 @@ static ssize_t amdgpu_set_pp_power_profile(struct device *dev,
|
||||
}
|
||||
|
||||
if (strncmp("set", buf, strlen("set")) == 0) {
|
||||
if (adev->pp_enabled)
|
||||
if (adev->powerplay.pp_funcs->set_power_profile_state)
|
||||
ret = amdgpu_dpm_set_power_profile_state(
|
||||
adev, request);
|
||||
else if (adev->pm.funcs->set_power_profile_state)
|
||||
ret = adev->pm.funcs->set_power_profile_state(
|
||||
adev, request);
|
||||
|
||||
if (ret) {
|
||||
count = -EINVAL;
|
||||
goto fail;
|
||||
@ -745,13 +707,8 @@ static ssize_t amdgpu_set_pp_power_profile(struct device *dev,
|
||||
|
||||
loop++;
|
||||
}
|
||||
|
||||
if (adev->pp_enabled)
|
||||
ret = amdgpu_dpm_set_power_profile_state(
|
||||
adev, request);
|
||||
else if (adev->pm.funcs->set_power_profile_state)
|
||||
ret = adev->pm.funcs->set_power_profile_state(
|
||||
adev, request);
|
||||
if (adev->powerplay.pp_funcs->set_power_profile_state)
|
||||
ret = amdgpu_dpm_set_power_profile_state(adev, request);
|
||||
|
||||
if (ret)
|
||||
count = -EINVAL;
|
||||
@ -831,7 +788,7 @@ static ssize_t amdgpu_hwmon_show_temp(struct device *dev,
|
||||
(ddev->switch_power_state != DRM_SWITCH_POWER_ON))
|
||||
return -EINVAL;
|
||||
|
||||
if (!adev->pp_enabled && !adev->pm.funcs->get_temperature)
|
||||
if (!adev->powerplay.pp_funcs->get_temperature)
|
||||
temp = 0;
|
||||
else
|
||||
temp = amdgpu_dpm_get_temperature(adev);
|
||||
@ -862,7 +819,7 @@ static ssize_t amdgpu_hwmon_get_pwm1_enable(struct device *dev,
|
||||
struct amdgpu_device *adev = dev_get_drvdata(dev);
|
||||
u32 pwm_mode = 0;
|
||||
|
||||
if (!adev->pp_enabled && !adev->pm.funcs->get_fan_control_mode)
|
||||
if (!adev->powerplay.pp_funcs->get_fan_control_mode)
|
||||
return -EINVAL;
|
||||
|
||||
pwm_mode = amdgpu_dpm_get_fan_control_mode(adev);
|
||||
@ -879,7 +836,7 @@ static ssize_t amdgpu_hwmon_set_pwm1_enable(struct device *dev,
|
||||
int err;
|
||||
int value;
|
||||
|
||||
if (!adev->pp_enabled && !adev->pm.funcs->set_fan_control_mode)
|
||||
if (!adev->powerplay.pp_funcs->set_fan_control_mode)
|
||||
return -EINVAL;
|
||||
|
||||
err = kstrtoint(buf, 10, &value);
|
||||
@ -919,9 +876,11 @@ static ssize_t amdgpu_hwmon_set_pwm1(struct device *dev,
|
||||
|
||||
value = (value * 100) / 255;
|
||||
|
||||
err = amdgpu_dpm_set_fan_speed_percent(adev, value);
|
||||
if (err)
|
||||
return err;
|
||||
if (adev->powerplay.pp_funcs->set_fan_speed_percent) {
|
||||
err = amdgpu_dpm_set_fan_speed_percent(adev, value);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
|
||||
return count;
|
||||
}
|
||||
@ -932,11 +891,13 @@ static ssize_t amdgpu_hwmon_get_pwm1(struct device *dev,
|
||||
{
|
||||
struct amdgpu_device *adev = dev_get_drvdata(dev);
|
||||
int err;
|
||||
u32 speed;
|
||||
u32 speed = 0;
|
||||
|
||||
err = amdgpu_dpm_get_fan_speed_percent(adev, &speed);
|
||||
if (err)
|
||||
return err;
|
||||
if (adev->powerplay.pp_funcs->get_fan_speed_percent) {
|
||||
err = amdgpu_dpm_get_fan_speed_percent(adev, &speed);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
|
||||
speed = (speed * 255) / 100;
|
||||
|
||||
@ -949,11 +910,13 @@ static ssize_t amdgpu_hwmon_get_fan1_input(struct device *dev,
|
||||
{
|
||||
struct amdgpu_device *adev = dev_get_drvdata(dev);
|
||||
int err;
|
||||
u32 speed;
|
||||
u32 speed = 0;
|
||||
|
||||
err = amdgpu_dpm_get_fan_speed_rpm(adev, &speed);
|
||||
if (err)
|
||||
return err;
|
||||
if (adev->powerplay.pp_funcs->get_fan_speed_rpm) {
|
||||
err = amdgpu_dpm_get_fan_speed_rpm(adev, &speed);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
|
||||
return sprintf(buf, "%i\n", speed);
|
||||
}
|
||||
@ -1008,21 +971,21 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
|
||||
return 0;
|
||||
|
||||
/* mask fan attributes if we have no bindings for this asic to expose */
|
||||
if ((!adev->pm.funcs->get_fan_speed_percent &&
|
||||
if ((!adev->powerplay.pp_funcs->get_fan_speed_percent &&
|
||||
attr == &sensor_dev_attr_pwm1.dev_attr.attr) || /* can't query fan */
|
||||
(!adev->pm.funcs->get_fan_control_mode &&
|
||||
(!adev->powerplay.pp_funcs->get_fan_control_mode &&
|
||||
attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr)) /* can't query state */
|
||||
effective_mode &= ~S_IRUGO;
|
||||
|
||||
if ((!adev->pm.funcs->set_fan_speed_percent &&
|
||||
if ((!adev->powerplay.pp_funcs->set_fan_speed_percent &&
|
||||
attr == &sensor_dev_attr_pwm1.dev_attr.attr) || /* can't manage fan */
|
||||
(!adev->pm.funcs->set_fan_control_mode &&
|
||||
(!adev->powerplay.pp_funcs->set_fan_control_mode &&
|
||||
attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr)) /* can't manage state */
|
||||
effective_mode &= ~S_IWUSR;
|
||||
|
||||
/* hide max/min values if we can't both query and manage the fan */
|
||||
if ((!adev->pm.funcs->set_fan_speed_percent &&
|
||||
!adev->pm.funcs->get_fan_speed_percent) &&
|
||||
if ((!adev->powerplay.pp_funcs->set_fan_speed_percent &&
|
||||
!adev->powerplay.pp_funcs->get_fan_speed_percent) &&
|
||||
(attr == &sensor_dev_attr_pwm1_max.dev_attr.attr ||
|
||||
attr == &sensor_dev_attr_pwm1_min.dev_attr.attr))
|
||||
return 0;
|
||||
@ -1055,7 +1018,7 @@ void amdgpu_dpm_thermal_work_handler(struct work_struct *work)
|
||||
if (!adev->pm.dpm_enabled)
|
||||
return;
|
||||
|
||||
if (adev->pm.funcs->get_temperature) {
|
||||
if (adev->powerplay.pp_funcs->get_temperature) {
|
||||
int temp = amdgpu_dpm_get_temperature(adev);
|
||||
|
||||
if (temp < adev->pm.dpm.thermal.min_temp)
|
||||
@ -1087,7 +1050,7 @@ static struct amdgpu_ps *amdgpu_dpm_pick_power_state(struct amdgpu_device *adev,
|
||||
true : false;
|
||||
|
||||
/* check if the vblank period is too short to adjust the mclk */
|
||||
if (single_display && adev->pm.funcs->vblank_too_short) {
|
||||
if (single_display && adev->powerplay.pp_funcs->vblank_too_short) {
|
||||
if (amdgpu_dpm_vblank_too_short(adev))
|
||||
single_display = false;
|
||||
}
|
||||
@ -1216,7 +1179,7 @@ static void amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev)
|
||||
struct amdgpu_ps *ps;
|
||||
enum amd_pm_state_type dpm_state;
|
||||
int ret;
|
||||
bool equal;
|
||||
bool equal = false;
|
||||
|
||||
/* if dpm init failed */
|
||||
if (!adev->pm.dpm_enabled)
|
||||
@ -1236,7 +1199,7 @@ static void amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev)
|
||||
else
|
||||
return;
|
||||
|
||||
if (amdgpu_dpm == 1) {
|
||||
if (amdgpu_dpm == 1 && adev->powerplay.pp_funcs->print_power_state) {
|
||||
printk("switching from power state:\n");
|
||||
amdgpu_dpm_print_power_state(adev, adev->pm.dpm.current_ps);
|
||||
printk("switching to power state:\n");
|
||||
@ -1245,15 +1208,17 @@ static void amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev)
|
||||
|
||||
/* update whether vce is active */
|
||||
ps->vce_active = adev->pm.dpm.vce_active;
|
||||
|
||||
amdgpu_dpm_display_configuration_changed(adev);
|
||||
if (adev->powerplay.pp_funcs->display_configuration_changed)
|
||||
amdgpu_dpm_display_configuration_changed(adev);
|
||||
|
||||
ret = amdgpu_dpm_pre_set_power_state(adev);
|
||||
if (ret)
|
||||
return;
|
||||
|
||||
if ((0 != amgdpu_dpm_check_state_equal(adev, adev->pm.dpm.current_ps, adev->pm.dpm.requested_ps, &equal)))
|
||||
equal = false;
|
||||
if (adev->powerplay.pp_funcs->check_state_equal) {
|
||||
if (0 != amdgpu_dpm_check_state_equal(adev, adev->pm.dpm.current_ps, adev->pm.dpm.requested_ps, &equal))
|
||||
equal = false;
|
||||
}
|
||||
|
||||
if (equal)
|
||||
return;
|
||||
@ -1264,7 +1229,7 @@ static void amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev)
|
||||
adev->pm.dpm.current_active_crtcs = adev->pm.dpm.new_active_crtcs;
|
||||
adev->pm.dpm.current_active_crtc_count = adev->pm.dpm.new_active_crtc_count;
|
||||
|
||||
if (adev->pm.funcs->force_performance_level) {
|
||||
if (adev->powerplay.pp_funcs->force_performance_level) {
|
||||
if (adev->pm.dpm.thermal_active) {
|
||||
enum amd_dpm_forced_level level = adev->pm.dpm.forced_level;
|
||||
/* force low perf level for thermal */
|
||||
@ -1280,7 +1245,7 @@ static void amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev)
|
||||
|
||||
void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable)
|
||||
{
|
||||
if (adev->pp_enabled || adev->pm.funcs->powergate_uvd) {
|
||||
if (adev->powerplay.pp_funcs->powergate_uvd) {
|
||||
/* enable/disable UVD */
|
||||
mutex_lock(&adev->pm.mutex);
|
||||
amdgpu_dpm_powergate_uvd(adev, !enable);
|
||||
@ -1302,7 +1267,7 @@ void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable)
|
||||
|
||||
void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable)
|
||||
{
|
||||
if (adev->pp_enabled || adev->pm.funcs->powergate_vce) {
|
||||
if (adev->powerplay.pp_funcs->powergate_vce) {
|
||||
/* enable/disable VCE */
|
||||
mutex_lock(&adev->pm.mutex);
|
||||
amdgpu_dpm_powergate_vce(adev, !enable);
|
||||
@ -1337,8 +1302,7 @@ void amdgpu_pm_print_power_states(struct amdgpu_device *adev)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (adev->pp_enabled)
|
||||
/* TO DO */
|
||||
if (adev->powerplay.pp_funcs->print_power_state == NULL)
|
||||
return;
|
||||
|
||||
for (i = 0; i < adev->pm.dpm.num_ps; i++)
|
||||
@ -1353,10 +1317,8 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
|
||||
if (adev->pm.sysfs_initialized)
|
||||
return 0;
|
||||
|
||||
if (!adev->pp_enabled) {
|
||||
if (adev->pm.funcs->get_temperature == NULL)
|
||||
return 0;
|
||||
}
|
||||
if (adev->powerplay.pp_funcs->get_temperature == NULL)
|
||||
return 0;
|
||||
|
||||
adev->pm.int_hwmon_dev = hwmon_device_register_with_groups(adev->dev,
|
||||
DRIVER_NAME, adev,
|
||||
@ -1634,8 +1596,8 @@ static int amdgpu_debugfs_pm_info(struct seq_file *m, void *data)
|
||||
return amdgpu_debugfs_pm_info_pp(m, adev);
|
||||
} else {
|
||||
mutex_lock(&adev->pm.mutex);
|
||||
if (adev->pm.funcs->debugfs_print_current_performance_level)
|
||||
adev->pm.funcs->debugfs_print_current_performance_level(adev, m);
|
||||
if (adev->powerplay.pp_funcs->debugfs_print_current_performance_level)
|
||||
adev->powerplay.pp_funcs->debugfs_print_current_performance_level(adev, m);
|
||||
else
|
||||
seq_printf(m, "Debugfs support not implemented for this asic\n");
|
||||
mutex_unlock(&adev->pm.mutex);
|
||||
|
||||
@ -87,17 +87,20 @@ static int amdgpu_pp_early_init(void *handle)
|
||||
case CHIP_OLAND:
|
||||
case CHIP_HAINAN:
|
||||
amd_pp->ip_funcs = &si_dpm_ip_funcs;
|
||||
amd_pp->pp_funcs = &si_dpm_funcs;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_DRM_AMDGPU_CIK
|
||||
case CHIP_BONAIRE:
|
||||
case CHIP_HAWAII:
|
||||
amd_pp->ip_funcs = &ci_dpm_ip_funcs;
|
||||
amd_pp->pp_funcs = &ci_dpm_funcs;
|
||||
break;
|
||||
case CHIP_KABINI:
|
||||
case CHIP_MULLINS:
|
||||
case CHIP_KAVERI:
|
||||
amd_pp->ip_funcs = &kv_dpm_ip_funcs;
|
||||
amd_pp->pp_funcs = &kv_dpm_funcs;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
|
||||
@ -307,7 +307,6 @@ static int ci_set_power_limit(struct amdgpu_device *adev, u32 n);
|
||||
static int ci_set_overdrive_target_tdp(struct amdgpu_device *adev,
|
||||
u32 target_tdp);
|
||||
static int ci_update_uvd_dpm(struct amdgpu_device *adev, bool gate);
|
||||
static void ci_dpm_set_dpm_funcs(struct amdgpu_device *adev);
|
||||
static void ci_dpm_set_irq_funcs(struct amdgpu_device *adev);
|
||||
|
||||
static PPSMC_Result amdgpu_ci_send_msg_to_smc_with_parameter(struct amdgpu_device *adev,
|
||||
@ -6282,7 +6281,6 @@ static int ci_dpm_early_init(void *handle)
|
||||
{
|
||||
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
|
||||
|
||||
ci_dpm_set_dpm_funcs(adev);
|
||||
ci_dpm_set_irq_funcs(adev);
|
||||
|
||||
return 0;
|
||||
@ -7035,7 +7033,7 @@ const struct amd_ip_funcs ci_dpm_ip_funcs = {
|
||||
.set_powergating_state = ci_dpm_set_powergating_state,
|
||||
};
|
||||
|
||||
static const struct amd_pm_funcs ci_dpm_funcs = {
|
||||
const struct amd_pm_funcs ci_dpm_funcs = {
|
||||
.get_temperature = &ci_dpm_get_temp,
|
||||
.pre_set_power_state = &ci_dpm_pre_set_power_state,
|
||||
.set_power_state = &ci_dpm_set_power_state,
|
||||
@ -7067,12 +7065,6 @@ static const struct amd_pm_funcs ci_dpm_funcs = {
|
||||
.read_sensor = ci_dpm_read_sensor,
|
||||
};
|
||||
|
||||
static void ci_dpm_set_dpm_funcs(struct amdgpu_device *adev)
|
||||
{
|
||||
if (adev->pm.funcs == NULL)
|
||||
adev->pm.funcs = &ci_dpm_funcs;
|
||||
}
|
||||
|
||||
static const struct amdgpu_irq_src_funcs ci_dpm_irq_funcs = {
|
||||
.set = ci_dpm_set_interrupt_state,
|
||||
.process = ci_dpm_process_interrupt,
|
||||
|
||||
@ -26,5 +26,6 @@
|
||||
|
||||
extern const struct amd_ip_funcs ci_dpm_ip_funcs;
|
||||
extern const struct amd_ip_funcs kv_dpm_ip_funcs;
|
||||
|
||||
extern const struct amd_pm_funcs ci_dpm_funcs;
|
||||
extern const struct amd_pm_funcs kv_dpm_funcs;
|
||||
#endif
|
||||
|
||||
@ -42,7 +42,6 @@
|
||||
#define KV_MINIMUM_ENGINE_CLOCK 800
|
||||
#define SMC_RAM_END 0x40000
|
||||
|
||||
static void kv_dpm_set_dpm_funcs(struct amdgpu_device *adev);
|
||||
static void kv_dpm_set_irq_funcs(struct amdgpu_device *adev);
|
||||
static int kv_enable_nb_dpm(struct amdgpu_device *adev,
|
||||
bool enable);
|
||||
@ -2961,7 +2960,6 @@ static int kv_dpm_early_init(void *handle)
|
||||
{
|
||||
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
|
||||
|
||||
kv_dpm_set_dpm_funcs(adev);
|
||||
kv_dpm_set_irq_funcs(adev);
|
||||
|
||||
return 0;
|
||||
@ -3327,7 +3325,7 @@ const struct amd_ip_funcs kv_dpm_ip_funcs = {
|
||||
.set_powergating_state = kv_dpm_set_powergating_state,
|
||||
};
|
||||
|
||||
static const struct amd_pm_funcs kv_dpm_funcs = {
|
||||
const struct amd_pm_funcs kv_dpm_funcs = {
|
||||
.get_temperature = &kv_dpm_get_temp,
|
||||
.pre_set_power_state = &kv_dpm_pre_set_power_state,
|
||||
.set_power_state = &kv_dpm_set_power_state,
|
||||
@ -3345,12 +3343,6 @@ static const struct amd_pm_funcs kv_dpm_funcs = {
|
||||
.read_sensor = &kv_dpm_read_sensor,
|
||||
};
|
||||
|
||||
static void kv_dpm_set_dpm_funcs(struct amdgpu_device *adev)
|
||||
{
|
||||
if (adev->pm.funcs == NULL)
|
||||
adev->pm.funcs = &kv_dpm_funcs;
|
||||
}
|
||||
|
||||
static const struct amdgpu_irq_src_funcs kv_dpm_irq_funcs = {
|
||||
.set = kv_dpm_set_interrupt_state,
|
||||
.process = kv_dpm_process_interrupt,
|
||||
|
||||
@ -1847,7 +1847,6 @@ static int si_calculate_sclk_params(struct amdgpu_device *adev,
|
||||
|
||||
static void si_thermal_start_smc_fan_control(struct amdgpu_device *adev);
|
||||
static void si_fan_ctrl_set_default_mode(struct amdgpu_device *adev);
|
||||
static void si_dpm_set_dpm_funcs(struct amdgpu_device *adev);
|
||||
static void si_dpm_set_irq_funcs(struct amdgpu_device *adev);
|
||||
|
||||
static struct si_power_info *si_get_pi(struct amdgpu_device *adev)
|
||||
@ -7944,7 +7943,6 @@ static int si_dpm_early_init(void *handle)
|
||||
|
||||
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
|
||||
|
||||
si_dpm_set_dpm_funcs(adev);
|
||||
si_dpm_set_irq_funcs(adev);
|
||||
return 0;
|
||||
}
|
||||
@ -8062,7 +8060,7 @@ const struct amd_ip_funcs si_dpm_ip_funcs = {
|
||||
.set_powergating_state = si_dpm_set_powergating_state,
|
||||
};
|
||||
|
||||
static const struct amd_pm_funcs si_dpm_funcs = {
|
||||
const struct amd_pm_funcs si_dpm_funcs = {
|
||||
.get_temperature = &si_dpm_get_temp,
|
||||
.pre_set_power_state = &si_dpm_pre_set_power_state,
|
||||
.set_power_state = &si_dpm_set_power_state,
|
||||
@ -8083,12 +8081,6 @@ static const struct amd_pm_funcs si_dpm_funcs = {
|
||||
.read_sensor = &si_dpm_read_sensor,
|
||||
};
|
||||
|
||||
static void si_dpm_set_dpm_funcs(struct amdgpu_device *adev)
|
||||
{
|
||||
if (adev->pm.funcs == NULL)
|
||||
adev->pm.funcs = &si_dpm_funcs;
|
||||
}
|
||||
|
||||
static const struct amdgpu_irq_src_funcs si_dpm_irq_funcs = {
|
||||
.set = si_dpm_set_interrupt_state,
|
||||
.process = si_dpm_process_interrupt,
|
||||
|
||||
@ -246,6 +246,7 @@ enum si_display_gap
|
||||
};
|
||||
|
||||
extern const struct amd_ip_funcs si_dpm_ip_funcs;
|
||||
extern const struct amd_pm_funcs si_dpm_funcs;
|
||||
|
||||
struct ni_leakage_coeffients
|
||||
{
|
||||
|
||||
Loading…
Reference in New Issue
Block a user