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at86rf230: add support for external xtal trim
This patch adds support for setting the xtal trim register. Some at86rf2xx transceiver boards needs fine tuning the xtal capacitor. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
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@ -11,6 +11,8 @@ Required properties:
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Optional properties:
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- reset-gpio: GPIO spec for the rstn pin
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- sleep-gpio: GPIO spec for the slp_tr pin
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- xtal-trim: u8 value for fine tuning the internal capacitance
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arrays of xtal pins: 0 = +0 pF, 0xf = +4.5 pF
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Example:
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@ -20,4 +22,5 @@ Example:
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reg = <0>;
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interrupts = <19 1>;
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interrupt-parent = <&gpio3>;
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xtal-trim = /bits/ 8 <0x06>;
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};
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@ -1315,7 +1315,7 @@ static struct at86rf2xx_chip_data at86rf212_data = {
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.get_desense_steps = at86rf212_get_desens_steps
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};
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static int at86rf230_hw_init(struct at86rf230_local *lp)
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static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
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{
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int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
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unsigned int dvdd;
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@ -1362,6 +1362,45 @@ static int at86rf230_hw_init(struct at86rf230_local *lp)
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usleep_range(lp->data->t_sleep_cycle,
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lp->data->t_sleep_cycle + 100);
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/* xtal_trim value is calculated by:
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* CL = 0.5 * (CX + CTRIM + CPAR)
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*
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* whereas:
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* CL = capacitor of used crystal
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* CX = connected capacitors at xtal pins
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* CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
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* but this is different on each board setup. You need to fine
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* tuning this value via CTRIM.
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* CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
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* 0 pF upto 4.5 pF.
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*
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* Examples:
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* atben transceiver:
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*
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* CL = 8 pF
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* CX = 12 pF
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* CPAR = 3 pF (We assume the magic constant from datasheet)
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* CTRIM = 0.9 pF
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*
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* (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
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*
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* xtal_trim = 0x3
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*
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* openlabs transceiver:
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*
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* CL = 16 pF
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* CX = 22 pF
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* CPAR = 3 pF (We assume the magic constant from datasheet)
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* CTRIM = 4.5 pF
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*
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* (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
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*
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* xtal_trim = 0xf
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*/
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rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
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if (rc)
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return rc;
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rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
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if (rc)
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return rc;
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@ -1378,9 +1417,11 @@ static int at86rf230_hw_init(struct at86rf230_local *lp)
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}
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static int
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at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr)
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at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
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u8 *xtal_trim)
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{
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struct at86rf230_platform_data *pdata = spi->dev.platform_data;
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int ret;
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if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
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if (!pdata)
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@ -1388,11 +1429,15 @@ at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr)
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*rstn = pdata->rstn;
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*slp_tr = pdata->slp_tr;
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*xtal_trim = pdata->xtal_trim;
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return 0;
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}
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*rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
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*slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
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ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
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if (ret < 0 && ret != -EINVAL)
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return ret;
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return 0;
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}
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@ -1505,13 +1550,14 @@ static int at86rf230_probe(struct spi_device *spi)
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struct at86rf230_local *lp;
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unsigned int status;
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int rc, irq_type, rstn, slp_tr;
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u8 xtal_trim;
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if (!spi->irq) {
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dev_err(&spi->dev, "no IRQ specified\n");
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return -EINVAL;
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}
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rc = at86rf230_get_pdata(spi, &rstn, &slp_tr);
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rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
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if (rc < 0) {
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dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
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return rc;
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@ -1570,7 +1616,7 @@ static int at86rf230_probe(struct spi_device *spi)
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spi_set_drvdata(spi, lp);
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rc = at86rf230_hw_init(lp);
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rc = at86rf230_hw_init(lp, xtal_trim);
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if (rc)
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goto free_dev;
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@ -22,6 +22,7 @@ struct at86rf230_platform_data {
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int rstn;
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int slp_tr;
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int dig2;
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u8 xtal_trim;
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};
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#endif
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