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parisc: fixes and cleanups in page cache flushing (4/4)
CONFIG_PARISC_TMPALIAS enables clear_user_highpage and copy_user_highpage. These are essentially alternative implementations of clear_user_page and copy_user_page. They don't have anything to do with x86 high pages, but they build on the infrastructure to save a few instructions. Read the comment in clear_user_highpage as it is very important to the implementation. For this reason, there isn't any gain in using the TMPALIAS/highpage approach. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
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@ -596,3 +596,67 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long
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__flush_cache_page(vma, vmaddr, page_to_phys(pfn_to_page(pfn)));
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}
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#ifdef CONFIG_PARISC_TMPALIAS
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void clear_user_highpage(struct page *page, unsigned long vaddr)
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{
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void *vto;
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unsigned long flags;
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/* Clear using TMPALIAS region. The page doesn't need to
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be flushed but the kernel mapping needs to be purged. */
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vto = kmap_atomic(page, KM_USER0);
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/* The PA-RISC 2.0 Architecture book states on page F-6:
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"Before a write-capable translation is enabled, *all*
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non-equivalently-aliased translations must be removed
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from the page table and purged from the TLB. (Note
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that the caches are not required to be flushed at this
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time.) Before any non-equivalent aliased translation
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is re-enabled, the virtual address range for the writeable
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page (the entire page) must be flushed from the cache,
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and the write-capable translation removed from the page
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table and purged from the TLB." */
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purge_kernel_dcache_page_asm((unsigned long)vto);
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purge_tlb_start(flags);
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pdtlb_kernel(vto);
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purge_tlb_end(flags);
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preempt_disable();
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clear_user_page_asm(vto, vaddr);
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preempt_enable();
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pagefault_enable(); /* kunmap_atomic(addr, KM_USER0); */
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}
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void copy_user_highpage(struct page *to, struct page *from,
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unsigned long vaddr, struct vm_area_struct *vma)
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{
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void *vfrom, *vto;
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unsigned long flags;
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/* Copy using TMPALIAS region. This has the advantage
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that the `from' page doesn't need to be flushed. However,
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the `to' page must be flushed in copy_user_page_asm since
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it can be used to bring in executable code. */
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vfrom = kmap_atomic(from, KM_USER0);
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vto = kmap_atomic(to, KM_USER1);
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purge_kernel_dcache_page_asm((unsigned long)vto);
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purge_tlb_start(flags);
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pdtlb_kernel(vto);
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pdtlb_kernel(vfrom);
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purge_tlb_end(flags);
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preempt_disable();
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copy_user_page_asm(vto, vfrom, vaddr);
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flush_dcache_page_asm(__pa(vto), vaddr);
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preempt_enable();
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pagefault_enable(); /* kunmap_atomic(addr, KM_USER1); */
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pagefault_enable(); /* kunmap_atomic(addr, KM_USER0); */
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}
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#endif /* CONFIG_PARISC_TMPALIAS */
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